armv8: factor out generic bit set/clr for debug registers

[openocd.git] / src / target / armv8_opcodes.h

diff --git a/src/target/armv8_opcodes.h b/src/target/armv8_opcodes.h
index 53dcb7e63ed27ea918c9b2b8ef3601e946a508ed..2d8ddd82479fb3def99152fddb8efd11668bec7a 100644 (file)
--- a/src/target/armv8_opcodes.h
+++ b/src/target/armv8_opcodes.h
@@ -42,6 +42,10 @@
 #define SYSTEM_ELR_EL2                 0b1110001000000001
 #define SYSTEM_ELR_EL3                 0b1111001000000001
 
+#define SYSTEM_SCTLR_EL1       0b1100000010000000
+#define SYSTEM_SCTLR_EL2       0b1110000010000000
+#define SYSTEM_SCTLR_EL3       0b1111000010000000
+
 #define SYSTEM_FPCR                    0b1101101000100000
 #define SYSTEM_FPSR                    0b1101101000100001
 #define SYSTEM_DAIF                    0b1101101000010001
@@ -148,6 +152,7 @@
 
 #define ARMV8_BKPT(Im) (0xD4200000 | ((Im & 0xffff) << 5))
 #define ARMV8_HLT(Im) (0x0D4400000 | ((Im & 0xffff) << 5))
+#define ARMV8_HLT_A1(Im) (0xE1000070 | ((Im & 0xFFF0) << 4) | (Im & 0xF))
 
 #define ARMV8_MOVFSP_64(Rt) ((1 << 31) | 0x11000000 | (0x1f << 5) | (Rt))
 #define ARMV8_MOVTSP_64(Rt) ((1 << 31) | 0x11000000 | (Rt << 5) | (0x1F))
@@ -171,6 +176,10 @@ enum armv8_opcode {
        ARMV8_OPC_DCPS,
        ARMV8_OPC_DRPS,
        ARMV8_OPC_ISB_SY,
+       ARMV8_OPC_DCCISW,
+       ARMV8_OPC_DCCIVAC,
+       ARMV8_OPC_ICIVAU,
+       ARMV8_OPC_HLT,
        ARMV8_OPC_NUM,
 };