arm_adi_v5: replace dap_lookup_cs_component()
[openocd.git] / src / target / cortex_a.c
index a538766ed0a33e061c79f2f801a1e89a09652ab9..20b2e517318b41bad951ed726f0b961975e67928 100644 (file)
@@ -56,6 +56,7 @@
 #include "armv7a_mmu.h"
 #include "target_request.h"
 #include "target_type.h"
+#include "arm_coresight.h"
 #include "arm_opcodes.h"
 #include "arm_semihosting.h"
 #include "jtag/interface.h"
@@ -638,14 +639,11 @@ static int cortex_a_dpm_setup(struct cortex_a_common *a, uint32_t didr)
 static struct target *get_cortex_a(struct target *target, int32_t coreid)
 {
        struct target_list *head;
-       struct target *curr;
 
-       head = target->head;
-       while (head != (struct target_list *)NULL) {
-               curr = head->target;
+       foreach_smp_target(head, target->smp_targets) {
+               struct target *curr = head->target;
                if ((curr->coreid == coreid) && (curr->state == TARGET_HALTED))
                        return curr;
-               head = head->next;
        }
        return target;
 }
@@ -655,14 +653,12 @@ static int cortex_a_halt_smp(struct target *target)
 {
        int retval = 0;
        struct target_list *head;
-       struct target *curr;
-       head = target->head;
-       while (head != (struct target_list *)NULL) {
-               curr = head->target;
+
+       foreach_smp_target(head, target->smp_targets) {
+               struct target *curr = head->target;
                if ((curr != target) && (curr->state != TARGET_HALTED)
                        && target_was_examined(curr))
                        retval += cortex_a_halt(curr);
-               head = head->next;
        }
        return retval;
 }
@@ -683,7 +679,7 @@ static int update_halt_gdb(struct target *target)
        if (target->gdb_service)
                gdb_target = target->gdb_service->target;
 
-       foreach_smp_target(head, target->head) {
+       foreach_smp_target(head, target->smp_targets) {
                curr = head->target;
                /* skip calling context */
                if (curr == target)
@@ -704,7 +700,7 @@ static int update_halt_gdb(struct target *target)
        }
 
        /* after all targets were updated, poll the gdb serving target */
-       if (gdb_target != NULL && gdb_target != target)
+       if (gdb_target && gdb_target != target)
                cortex_a_poll(gdb_target);
        return retval;
 }
@@ -726,7 +722,7 @@ static int cortex_a_poll(struct target *target)
        /*  the next polling trigger an halt event sent to gdb */
        if ((target->state == TARGET_HALTED) && (target->smp) &&
                (target->gdb_service) &&
-               (target->gdb_service->target == NULL)) {
+               (!target->gdb_service->target)) {
                target->gdb_service->target =
                        get_cortex_a(target, target->gdb_service->core[1]);
                target_call_event_callbacks(target, TARGET_EVENT_HALTED);
@@ -950,11 +946,10 @@ static int cortex_a_restore_smp(struct target *target, int handle_breakpoints)
 {
        int retval = 0;
        struct target_list *head;
-       struct target *curr;
        target_addr_t address;
-       head = target->head;
-       while (head != (struct target_list *)NULL) {
-               curr = head->target;
+
+       foreach_smp_target(head, target->smp_targets) {
+               struct target *curr = head->target;
                if ((curr != target) && (curr->state != TARGET_RUNNING)
                        && target_was_examined(curr)) {
                        /*  resume current address , not in step mode */
@@ -962,8 +957,6 @@ static int cortex_a_restore_smp(struct target *target, int handle_breakpoints)
                                        handle_breakpoints, 0);
                        retval += cortex_a_internal_restart(curr);
                }
-               head = head->next;
-
        }
        return retval;
 }
@@ -1138,7 +1131,7 @@ static int cortex_a_set_dscr_bits(struct target *target,
        /* Read DSCR */
        int retval = mem_ap_read_atomic_u32(armv7a->debug_ap,
                        armv7a->debug_base + CPUDBG_DSCR, &dscr);
-       if (ERROR_OK != retval)
+       if (retval != ERROR_OK)
                return retval;
 
        /* clear bitfield */
@@ -1192,12 +1185,12 @@ static int cortex_a_step(struct target *target, int current, target_addr_t addre
        stepbreakpoint.length = (arm->core_state == ARM_STATE_THUMB)
                ? 2 : 4;
        stepbreakpoint.type = BKPT_HARD;
-       stepbreakpoint.set = 0;
+       stepbreakpoint.is_set = false;
 
        /* Disable interrupts during single step if requested */
        if (cortex_a->isrmasking_mode == CORTEX_A_ISRMASK_ON) {
                retval = cortex_a_set_dscr_bits(target, DSCR_INT_DIS, DSCR_INT_DIS);
-               if (ERROR_OK != retval)
+               if (retval != ERROR_OK)
                        return retval;
        }
 
@@ -1228,7 +1221,7 @@ static int cortex_a_step(struct target *target, int current, target_addr_t addre
        /* Re-enable interrupts if they were disabled */
        if (cortex_a->isrmasking_mode == CORTEX_A_ISRMASK_ON) {
                retval = cortex_a_set_dscr_bits(target, DSCR_INT_DIS, 0);
-               if (ERROR_OK != retval)
+               if (retval != ERROR_OK)
                        return retval;
        }
 
@@ -1272,7 +1265,7 @@ static int cortex_a_set_breakpoint(struct target *target,
        struct armv7a_common *armv7a = &cortex_a->armv7a_common;
        struct cortex_a_brp *brp_list = cortex_a->brp_list;
 
-       if (breakpoint->set) {
+       if (breakpoint->is_set) {
                LOG_WARNING("breakpoint already set");
                return ERROR_OK;
        }
@@ -1284,7 +1277,7 @@ static int cortex_a_set_breakpoint(struct target *target,
                        LOG_ERROR("ERROR Can not find free Breakpoint Register Pair");
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
-               breakpoint->set = brp_i + 1;
+               breakpoint_hw_set(breakpoint, brp_i);
                if (breakpoint->length == 2)
                        byte_addr_select = (3 << (breakpoint->address & 0x02));
                control = ((matchmode & 0x7) << 20)
@@ -1294,12 +1287,12 @@ static int cortex_a_set_breakpoint(struct target *target,
                brp_list[brp_i].value = (breakpoint->address & 0xFFFFFFFC);
                brp_list[brp_i].control = control;
                retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                               + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].BRPn,
+                               + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].brpn,
                                brp_list[brp_i].value);
                if (retval != ERROR_OK)
                        return retval;
                retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                               + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].BRPn,
+                               + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].brpn,
                                brp_list[brp_i].control);
                if (retval != ERROR_OK)
                        return retval;
@@ -1349,7 +1342,7 @@ static int cortex_a_set_breakpoint(struct target *target,
                armv7a_l1_i_cache_inval_virt(target, breakpoint->address,
                                                 breakpoint->length);
 
-               breakpoint->set = 0x11; /* Any nice value but 0 */
+               breakpoint->is_set = true;
        }
 
        return ERROR_OK;
@@ -1366,7 +1359,7 @@ static int cortex_a_set_context_breakpoint(struct target *target,
        struct armv7a_common *armv7a = &cortex_a->armv7a_common;
        struct cortex_a_brp *brp_list = cortex_a->brp_list;
 
-       if (breakpoint->set) {
+       if (breakpoint->is_set) {
                LOG_WARNING("breakpoint already set");
                return retval;
        }
@@ -1380,7 +1373,7 @@ static int cortex_a_set_context_breakpoint(struct target *target,
                return ERROR_FAIL;
        }
 
-       breakpoint->set = brp_i + 1;
+       breakpoint_hw_set(breakpoint, brp_i);
        control = ((matchmode & 0x7) << 20)
                | (byte_addr_select << 5)
                | (3 << 1) | 1;
@@ -1388,12 +1381,12 @@ static int cortex_a_set_context_breakpoint(struct target *target,
        brp_list[brp_i].value = (breakpoint->asid);
        brp_list[brp_i].control = control;
        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].BRPn,
+                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].brpn,
                        brp_list[brp_i].value);
        if (retval != ERROR_OK)
                return retval;
        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].BRPn,
+                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].brpn,
                        brp_list[brp_i].control);
        if (retval != ERROR_OK)
                return retval;
@@ -1409,16 +1402,16 @@ static int cortex_a_set_hybrid_breakpoint(struct target *target, struct breakpoi
        int retval = ERROR_FAIL;
        int brp_1 = 0;  /* holds the contextID pair */
        int brp_2 = 0;  /* holds the IVA pair */
-       uint32_t control_CTX, control_IVA;
-       uint8_t CTX_byte_addr_select = 0x0F;
-       uint8_t IVA_byte_addr_select = 0x0F;
-       uint8_t CTX_machmode = 0x03;
-       uint8_t IVA_machmode = 0x01;
+       uint32_t control_ctx, control_iva;
+       uint8_t ctx_byte_addr_select = 0x0F;
+       uint8_t iva_byte_addr_select = 0x0F;
+       uint8_t ctx_machmode = 0x03;
+       uint8_t iva_machmode = 0x01;
        struct cortex_a_common *cortex_a = target_to_cortex_a(target);
        struct armv7a_common *armv7a = &cortex_a->armv7a_common;
        struct cortex_a_brp *brp_list = cortex_a->brp_list;
 
-       if (breakpoint->set) {
+       if (breakpoint->is_set) {
                LOG_WARNING("breakpoint already set");
                return retval;
        }
@@ -1443,41 +1436,41 @@ static int cortex_a_set_hybrid_breakpoint(struct target *target, struct breakpoi
                return ERROR_FAIL;
        }
 
-       breakpoint->set = brp_1 + 1;
+       breakpoint_hw_set(breakpoint, brp_1);
        breakpoint->linked_brp = brp_2;
-       control_CTX = ((CTX_machmode & 0x7) << 20)
+       control_ctx = ((ctx_machmode & 0x7) << 20)
                | (brp_2 << 16)
                | (0 << 14)
-               | (CTX_byte_addr_select << 5)
+               | (ctx_byte_addr_select << 5)
                | (3 << 1) | 1;
        brp_list[brp_1].used = true;
        brp_list[brp_1].value = (breakpoint->asid);
-       brp_list[brp_1].control = control_CTX;
+       brp_list[brp_1].control = control_ctx;
        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_1].BRPn,
+                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_1].brpn,
                        brp_list[brp_1].value);
        if (retval != ERROR_OK)
                return retval;
        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_1].BRPn,
+                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_1].brpn,
                        brp_list[brp_1].control);
        if (retval != ERROR_OK)
                return retval;
 
-       control_IVA = ((IVA_machmode & 0x7) << 20)
+       control_iva = ((iva_machmode & 0x7) << 20)
                | (brp_1 << 16)
-               | (IVA_byte_addr_select << 5)
+               | (iva_byte_addr_select << 5)
                | (3 << 1) | 1;
        brp_list[brp_2].used = true;
        brp_list[brp_2].value = (breakpoint->address & 0xFFFFFFFC);
-       brp_list[brp_2].control = control_IVA;
+       brp_list[brp_2].control = control_iva;
        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_2].BRPn,
+                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_2].brpn,
                        brp_list[brp_2].value);
        if (retval != ERROR_OK)
                return retval;
        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_2].BRPn,
+                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_2].brpn,
                        brp_list[brp_2].control);
        if (retval != ERROR_OK)
                return retval;
@@ -1492,16 +1485,16 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
        struct armv7a_common *armv7a = &cortex_a->armv7a_common;
        struct cortex_a_brp *brp_list = cortex_a->brp_list;
 
-       if (!breakpoint->set) {
+       if (!breakpoint->is_set) {
                LOG_WARNING("breakpoint not set");
                return ERROR_OK;
        }
 
        if (breakpoint->type == BKPT_HARD) {
                if ((breakpoint->address != 0) && (breakpoint->asid != 0)) {
-                       int brp_i = breakpoint->set - 1;
+                       int brp_i = breakpoint->number;
                        int brp_j = breakpoint->linked_brp;
-                       if ((brp_i < 0) || (brp_i >= cortex_a->brp_num)) {
+                       if (brp_i >= cortex_a->brp_num) {
                                LOG_DEBUG("Invalid BRP number in breakpoint");
                                return ERROR_OK;
                        }
@@ -1511,12 +1504,12 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
                        brp_list[brp_i].value = 0;
                        brp_list[brp_i].control = 0;
                        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].BRPn,
+                                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].brpn,
                                        brp_list[brp_i].control);
                        if (retval != ERROR_OK)
                                return retval;
                        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].BRPn,
+                                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].brpn,
                                        brp_list[brp_i].value);
                        if (retval != ERROR_OK)
                                return retval;
@@ -1530,22 +1523,22 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
                        brp_list[brp_j].value = 0;
                        brp_list[brp_j].control = 0;
                        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_j].BRPn,
+                                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_j].brpn,
                                        brp_list[brp_j].control);
                        if (retval != ERROR_OK)
                                return retval;
                        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_j].BRPn,
+                                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_j].brpn,
                                        brp_list[brp_j].value);
                        if (retval != ERROR_OK)
                                return retval;
                        breakpoint->linked_brp = 0;
-                       breakpoint->set = 0;
+                       breakpoint->is_set = false;
                        return ERROR_OK;
 
                } else {
-                       int brp_i = breakpoint->set - 1;
-                       if ((brp_i < 0) || (brp_i >= cortex_a->brp_num)) {
+                       int brp_i = breakpoint->number;
+                       if (brp_i >= cortex_a->brp_num) {
                                LOG_DEBUG("Invalid BRP number in breakpoint");
                                return ERROR_OK;
                        }
@@ -1555,16 +1548,16 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
                        brp_list[brp_i].value = 0;
                        brp_list[brp_i].control = 0;
                        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].BRPn,
+                                       + CPUDBG_BCR_BASE + 4 * brp_list[brp_i].brpn,
                                        brp_list[brp_i].control);
                        if (retval != ERROR_OK)
                                return retval;
                        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].BRPn,
+                                       + CPUDBG_BVR_BASE + 4 * brp_list[brp_i].brpn,
                                        brp_list[brp_i].value);
                        if (retval != ERROR_OK)
                                return retval;
-                       breakpoint->set = 0;
+                       breakpoint->is_set = false;
                        return ERROR_OK;
                }
        } else {
@@ -1596,7 +1589,7 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
                armv7a_l1_i_cache_inval_virt(target, breakpoint->address,
                                                 breakpoint->length);
        }
-       breakpoint->set = 0;
+       breakpoint->is_set = false;
 
        return ERROR_OK;
 }
@@ -1662,7 +1655,7 @@ static int cortex_a_remove_breakpoint(struct target *target, struct breakpoint *
        }
 #endif
 
-       if (breakpoint->set) {
+       if (breakpoint->is_set) {
                cortex_a_unset_breakpoint(target, breakpoint);
                if (breakpoint->type == BKPT_HARD)
                        cortex_a->brp_num_available++;
@@ -1695,7 +1688,7 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat
        struct armv7a_common *armv7a = &cortex_a->armv7a_common;
        struct cortex_a_wrp *wrp_list = cortex_a->wrp_list;
 
-       if (watchpoint->set) {
+       if (watchpoint->is_set) {
                LOG_WARNING("watchpoint already set");
                return retval;
        }
@@ -1748,7 +1741,7 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat
                break;
        }
 
-       watchpoint->set = wrp_i + 1;
+       watchpoint_set(watchpoint, wrp_i);
        control = (address_mask << 24) |
                (byte_address_select << 5) |
                (load_store_access_control << 3) |
@@ -1758,13 +1751,13 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat
        wrp_list[wrp_i].control = control;
 
        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                       + CPUDBG_WVR_BASE + 4 * wrp_list[wrp_i].WRPn,
+                       + CPUDBG_WVR_BASE + 4 * wrp_list[wrp_i].wrpn,
                        wrp_list[wrp_i].value);
        if (retval != ERROR_OK)
                return retval;
 
        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                       + CPUDBG_WCR_BASE + 4 * wrp_list[wrp_i].WRPn,
+                       + CPUDBG_WCR_BASE + 4 * wrp_list[wrp_i].wrpn,
                        wrp_list[wrp_i].control);
        if (retval != ERROR_OK)
                return retval;
@@ -1791,13 +1784,13 @@ static int cortex_a_unset_watchpoint(struct target *target, struct watchpoint *w
        struct armv7a_common *armv7a = &cortex_a->armv7a_common;
        struct cortex_a_wrp *wrp_list = cortex_a->wrp_list;
 
-       if (!watchpoint->set) {
+       if (!watchpoint->is_set) {
                LOG_WARNING("watchpoint not set");
                return ERROR_OK;
        }
 
-       int wrp_i = watchpoint->set - 1;
-       if (wrp_i < 0 || wrp_i >= cortex_a->wrp_num) {
+       int wrp_i = watchpoint->number;
+       if (wrp_i >= cortex_a->wrp_num) {
                LOG_DEBUG("Invalid WRP number in watchpoint");
                return ERROR_OK;
        }
@@ -1807,16 +1800,16 @@ static int cortex_a_unset_watchpoint(struct target *target, struct watchpoint *w
        wrp_list[wrp_i].value = 0;
        wrp_list[wrp_i].control = 0;
        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                       + CPUDBG_WCR_BASE + 4 * wrp_list[wrp_i].WRPn,
+                       + CPUDBG_WCR_BASE + 4 * wrp_list[wrp_i].wrpn,
                        wrp_list[wrp_i].control);
        if (retval != ERROR_OK)
                return retval;
        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
-                       + CPUDBG_WVR_BASE + 4 * wrp_list[wrp_i].WRPn,
+                       + CPUDBG_WVR_BASE + 4 * wrp_list[wrp_i].wrpn,
                        wrp_list[wrp_i].value);
        if (retval != ERROR_OK)
                return retval;
-       watchpoint->set = 0;
+       watchpoint->is_set = false;
 
        return ERROR_OK;
 }
@@ -1858,7 +1851,7 @@ static int cortex_a_remove_watchpoint(struct target *target, struct watchpoint *
 {
        struct cortex_a_common *cortex_a = target_to_cortex_a(target);
 
-       if (watchpoint->set) {
+       if (watchpoint->is_set) {
                cortex_a->wrp_num_available++;
                cortex_a_unset_watchpoint(target, watchpoint);
        }
@@ -2886,16 +2879,21 @@ static int cortex_a_examine_first(struct target *target)
        struct cortex_a_common *cortex_a = target_to_cortex_a(target);
        struct armv7a_common *armv7a = &cortex_a->armv7a_common;
        struct adiv5_dap *swjdp = armv7a->arm.dap;
+       struct adiv5_private_config *pc = target->private_config;
 
        int i;
        int retval = ERROR_OK;
        uint32_t didr, cpuid, dbg_osreg, dbg_idpfr1;
 
-       /* Search for the APB-AP - it is needed for access to debug registers */
-       retval = dap_find_ap(swjdp, AP_TYPE_APB_AP, &armv7a->debug_ap);
-       if (retval != ERROR_OK) {
-               LOG_ERROR("Could not find APB-AP for debug access");
-               return retval;
+       if (pc->ap_num == DP_APSEL_INVALID) {
+               /* Search for the APB-AP - it is needed for access to debug registers */
+               retval = dap_find_ap(swjdp, AP_TYPE_APB_AP, &armv7a->debug_ap);
+               if (retval != ERROR_OK) {
+                       LOG_ERROR("Could not find APB-AP for debug access");
+                       return retval;
+               }
+       } else {
+               armv7a->debug_ap = dap_ap(swjdp, pc->ap_num);
        }
 
        retval = mem_ap_init(armv7a->debug_ap);
@@ -2907,18 +2905,11 @@ static int cortex_a_examine_first(struct target *target)
        armv7a->debug_ap->memaccess_tck = 80;
 
        if (!target->dbgbase_set) {
-               target_addr_t dbgbase;
-               /* Get ROM Table base */
-               uint32_t apid;
-               int32_t coreidx = target->coreid;
                LOG_DEBUG("%s's dbgbase is not set, trying to detect using the ROM table",
                          target->cmd_name);
-               retval = dap_get_debugbase(armv7a->debug_ap, &dbgbase, &apid);
-               if (retval != ERROR_OK)
-                       return retval;
-               /* Lookup 0x15 -- Processor DAP */
-               retval = dap_lookup_cs_component(armv7a->debug_ap, dbgbase, 0x15,
-                               &armv7a->debug_base, &coreidx);
+               /* Lookup Processor DAP */
+               retval = dap_lookup_cs_component(armv7a->debug_ap, ARM_CS_C9_DEVTYPE_CORE_DEBUG,
+                               &armv7a->debug_base, target->coreid);
                if (retval != ERROR_OK) {
                        LOG_ERROR("Can't detect %s's dbgbase from the ROM table; you need to specify it explicitly.",
                                  target->cmd_name);
@@ -3040,7 +3031,7 @@ static int cortex_a_examine_first(struct target *target)
                        cortex_a->brp_list[i].type = BRP_CONTEXT;
                cortex_a->brp_list[i].value = 0;
                cortex_a->brp_list[i].control = 0;
-               cortex_a->brp_list[i].BRPn = i;
+               cortex_a->brp_list[i].brpn = i;
        }
 
        LOG_DEBUG("Configured %i hw breakpoints", cortex_a->brp_num);
@@ -3054,7 +3045,7 @@ static int cortex_a_examine_first(struct target *target)
                cortex_a->wrp_list[i].used = false;
                cortex_a->wrp_list[i].value = 0;
                cortex_a->wrp_list[i].control = 0;
-               cortex_a->wrp_list[i].WRPn = i;
+               cortex_a->wrp_list[i].wrpn = i;
        }
 
        LOG_DEBUG("Configured %i hw watchpoints", cortex_a->wrp_num);
@@ -3126,13 +3117,13 @@ static int cortex_a_target_create(struct target *target, Jim_Interp *interp)
        struct cortex_a_common *cortex_a;
        struct adiv5_private_config *pc;
 
-       if (target->private_config == NULL)
+       if (!target->private_config)
                return ERROR_FAIL;
 
        pc = (struct adiv5_private_config *)target->private_config;
 
        cortex_a = calloc(1, sizeof(struct cortex_a_common));
-       if (cortex_a == NULL) {
+       if (!cortex_a) {
                LOG_ERROR("Out of memory");
                return ERROR_FAIL;
        }
@@ -3153,7 +3144,7 @@ static int cortex_r4_target_create(struct target *target, Jim_Interp *interp)
                return ERROR_FAIL;
 
        cortex_a = calloc(1, sizeof(struct cortex_a_common));
-       if (cortex_a == NULL) {
+       if (!cortex_a) {
                LOG_ERROR("Out of memory");
                return ERROR_FAIL;
        }
@@ -3268,7 +3259,7 @@ COMMAND_HANDLER(handle_cortex_a_mask_interrupts_command)
 
        if (CMD_ARGC > 0) {
                n = jim_nvp_name2value_simple(nvp_maskisr_modes, CMD_ARGV[0]);
-               if (n->name == NULL) {
+               if (!n->name) {
                        LOG_ERROR("Unknown parameter: %s - should be off or on", CMD_ARGV[0]);
                        return ERROR_COMMAND_SYNTAX_ERROR;
                }
@@ -3296,7 +3287,7 @@ COMMAND_HANDLER(handle_cortex_a_dacrfixup_command)
 
        if (CMD_ARGC > 0) {
                n = jim_nvp_name2value_simple(nvp_dacrfixup_modes, CMD_ARGV[0]);
-               if (n->name == NULL)
+               if (!n->name)
                        return ERROR_COMMAND_SYNTAX_ERROR;
                cortex_a->dacrfixup_mode = n->value;
 

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