helper/jim-nvp: comply with coding style [2/2]

[openocd.git] / src / target / cortex_a.c

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 9e8248a74c1151254e63f9b1db77462576969a3e..6b76656b91e0c52c0211e11486e920367257e9d3 100644 (file)
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -61,6 +61,7 @@
 #include "jtag/interface.h"
 #include "transport/transport.h"
 #include "smp.h"
+#include <helper/bits.h>
 #include <helper/time_support.h>
 
 static int cortex_a_poll(struct target *target);
@@ -1686,8 +1687,9 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat
        int retval = ERROR_OK;
        int wrp_i = 0;
        uint32_t control;
-       uint8_t address_mask = ilog2(watchpoint->length);
-       uint8_t byte_address_select = 0xFF;
+       uint32_t address;
+       uint8_t address_mask;
+       uint8_t byte_address_select;
        uint8_t load_store_access_control = 0x3;
        struct cortex_a_common *cortex_a = target_to_cortex_a(target);
        struct armv7a_common *armv7a = &cortex_a->armv7a_common;
@@ -1707,18 +1709,52 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat
                return ERROR_FAIL;
        }
 
-       if (address_mask == 0x1 || address_mask == 0x2) {
-               LOG_WARNING("length must be a power of 2 and different than 2 and 4");
+       if (watchpoint->length == 0 || watchpoint->length > 0x80000000U ||
+                       (watchpoint->length & (watchpoint->length - 1))) {
+               LOG_WARNING("watchpoint length must be a power of 2");
                return ERROR_FAIL;
        }
 
+       if (watchpoint->address & (watchpoint->length - 1)) {
+               LOG_WARNING("watchpoint address must be aligned at length");
+               return ERROR_FAIL;
+       }
+
+       /* FIXME: ARM DDI 0406C: address_mask is optional. What to do if it's missing?  */
+       /* handle wp length 1 and 2 through byte select */
+       switch (watchpoint->length) {
+       case 1:
+               byte_address_select = BIT(watchpoint->address & 0x3);
+               address = watchpoint->address & ~0x3;
+               address_mask = 0;
+               break;
+
+       case 2:
+               byte_address_select = 0x03 << (watchpoint->address & 0x2);
+               address = watchpoint->address & ~0x3;
+               address_mask = 0;
+               break;
+
+       case 4:
+               byte_address_select = 0x0f;
+               address = watchpoint->address;
+               address_mask = 0;
+               break;
+
+       default:
+               byte_address_select = 0xff;
+               address = watchpoint->address;
+               address_mask = ilog2(watchpoint->length);
+               break;
+       }
+
        watchpoint->set = wrp_i + 1;
        control = (address_mask << 24) |
                (byte_address_select << 5) |
                (load_store_access_control << 3) |
                (0x3 << 1) | 1;
        wrp_list[wrp_i].used = 1;
-       wrp_list[wrp_i].value = (watchpoint->address & 0xFFFFFFFC);
+       wrp_list[wrp_i].value = address;
        wrp_list[wrp_i].control = control;
 
        retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
@@ -1802,8 +1838,12 @@ static int cortex_a_add_watchpoint(struct target *target, struct watchpoint *wat
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
+       int retval = cortex_a_set_watchpoint(target, watchpoint);
+       if (retval != ERROR_OK)
+               return retval;
+
        cortex_a->wrp_num_available--;
-       return cortex_a_set_watchpoint(target, watchpoint);
+       return ERROR_OK;
 }
 
 /**
@@ -3007,7 +3047,7 @@ static int cortex_a_examine_first(struct target *target)
 
        /* Setup Watchpoint Register Pairs */
        cortex_a->wrp_num = ((didr >> 28) & 0x0F) + 1;
-       cortex_a->wrp_num_available = cortex_a->brp_num;
+       cortex_a->wrp_num_available = cortex_a->wrp_num;
        free(cortex_a->wrp_list);
        cortex_a->wrp_list = calloc(cortex_a->wrp_num, sizeof(struct cortex_a_wrp));
        for (i = 0; i < cortex_a->wrp_num; i++) {
@@ -3141,6 +3181,7 @@ static void cortex_a_deinit_target(struct target *target)
                                        dscr & ~DSCR_HALT_DBG_MODE);
        }
 
+       free(cortex_a->wrp_list);
        free(cortex_a->brp_list);
        arm_free_reg_cache(dpm->arm);
        free(dpm->dbp);
@@ -3218,15 +3259,15 @@ COMMAND_HANDLER(handle_cortex_a_mask_interrupts_command)
        struct target *target = get_current_target(CMD_CTX);
        struct cortex_a_common *cortex_a = target_to_cortex_a(target);
 
-       static const Jim_Nvp nvp_maskisr_modes[] = {
+       static const struct jim_nvp nvp_maskisr_modes[] = {
                { .name = "off", .value = CORTEX_A_ISRMASK_OFF },
                { .name = "on", .value = CORTEX_A_ISRMASK_ON },
                { .name = NULL, .value = -1 },
        };
-       const Jim_Nvp *n;
+       const struct jim_nvp *n;
 
        if (CMD_ARGC > 0) {
-               n = Jim_Nvp_name2value_simple(nvp_maskisr_modes, CMD_ARGV[0]);
+               n = jim_nvp_name2value_simple(nvp_maskisr_modes, CMD_ARGV[0]);
                if (n->name == NULL) {
                        LOG_ERROR("Unknown parameter: %s - should be off or on", CMD_ARGV[0]);
                        return ERROR_COMMAND_SYNTAX_ERROR;
@@ -3235,7 +3276,7 @@ COMMAND_HANDLER(handle_cortex_a_mask_interrupts_command)
                cortex_a->isrmasking_mode = n->value;
        }
 
-       n = Jim_Nvp_value2name_simple(nvp_maskisr_modes, cortex_a->isrmasking_mode);
+       n = jim_nvp_value2name_simple(nvp_maskisr_modes, cortex_a->isrmasking_mode);
        command_print(CMD, "cortex_a interrupt mask %s", n->name);
 
        return ERROR_OK;
@@ -3246,22 +3287,22 @@ COMMAND_HANDLER(handle_cortex_a_dacrfixup_command)
        struct target *target = get_current_target(CMD_CTX);
        struct cortex_a_common *cortex_a = target_to_cortex_a(target);
 
-       static const Jim_Nvp nvp_dacrfixup_modes[] = {
+       static const struct jim_nvp nvp_dacrfixup_modes[] = {
                { .name = "off", .value = CORTEX_A_DACRFIXUP_OFF },
                { .name = "on", .value = CORTEX_A_DACRFIXUP_ON },
                { .name = NULL, .value = -1 },
        };
-       const Jim_Nvp *n;
+       const struct jim_nvp *n;
 
        if (CMD_ARGC > 0) {
-               n = Jim_Nvp_name2value_simple(nvp_dacrfixup_modes, CMD_ARGV[0]);
+               n = jim_nvp_name2value_simple(nvp_dacrfixup_modes, CMD_ARGV[0]);
                if (n->name == NULL)
                        return ERROR_COMMAND_SYNTAX_ERROR;
                cortex_a->dacrfixup_mode = n->value;
 
        }
 
-       n = Jim_Nvp_value2name_simple(nvp_dacrfixup_modes, cortex_a->dacrfixup_mode);
+       n = jim_nvp_value2name_simple(nvp_dacrfixup_modes, cortex_a->dacrfixup_mode);
        command_print(CMD, "cortex_a domain access control fixup %s", n->name);
 
        return ERROR_OK;