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armv7a: fix handling of inner caches
[openocd.git] / src / target / cortex_a.c
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 5fd8731885d1bf8d3c73388c61fca607b133b26a..f9c927364608a8593e586fc6093a016e06360113 100644 (file)
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -1305,7 +1305,7 @@ static int cortex_a_post_debug_entry(struct target *target)
        LOG_DEBUG("cp15_control_reg: %8.8" PRIx32, cortex_a->cp15_control_reg);
        cortex_a->cp15_control_reg_curr = cortex_a->cp15_control_reg;
 
-       if (armv7a->armv7a_mmu.armv7a_cache.ctype == -1)
+       if (armv7a->armv7a_mmu.armv7a_cache.info == -1)
                armv7a_identify_cache(target);
 
        if (armv7a->is_armv7r) {
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