#include "config.h"
#endif
+#include "breakpoints.h"
#include "cortex_a8.h"
-#include "armv7a.h"
-#include "armv4_5.h"
-
+#include "register.h"
#include "target_request.h"
#include "target_type.h"
if (brp_i >= cortex_a8->brp_num)
{
LOG_ERROR("ERROR Can not find free Breakpoint Register Pair");
- exit(-1);
+ return ERROR_FAIL;
}
breakpoint->set = brp_i + 1;
if (breakpoint->length == 2)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
-
- int retval = ERROR_OK;
-
- /* sanitize arguments */
- if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
- return ERROR_INVALID_ARGUMENTS;
+ int retval = ERROR_INVALID_ARGUMENTS;
/* cortex_a8 handles unaligned memory access */
// ??? dap_ap_select(swjdp, swjdp_memoryap);
- switch (size)
- {
+ if (count && buffer) {
+ switch (size) {
case 4:
retval = mem_ap_read_buf_u32(swjdp, buffer, 4 * count, address);
break;
case 1:
retval = mem_ap_read_buf_u8(swjdp, buffer, count, address);
break;
- default:
- LOG_ERROR("BUG: we shouldn't get here");
- exit(-1);
+ }
}
return retval;
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
-
- int retval;
-
- /* sanitize arguments */
- if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
- return ERROR_INVALID_ARGUMENTS;
+ int retval = ERROR_INVALID_ARGUMENTS;
// ??? dap_ap_select(swjdp, swjdp_memoryap);
- switch (size)
- {
+ if (count && buffer) {
+ switch (size) {
case 4:
retval = mem_ap_write_buf_u32(swjdp, buffer, 4 * count, address);
break;
case 1:
retval = mem_ap_write_buf_u8(swjdp, buffer, count, address);
break;
- default:
- LOG_ERROR("BUG: we shouldn't get here");
- exit(-1);
+ }
}
- if (target->state == TARGET_HALTED)
+ if (retval == ERROR_OK && target->state == TARGET_HALTED)
{
/* The Cache handling will NOT work with MMU active, the wrong addresses will be invalidated */
/* invalidate I-Cache */
static int cortex_a8_handle_target_request(void *priv)
{
struct target *target = priv;
- if (!target->type->examined)
- return ERROR_OK;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
+ if (!target_was_examined(target))
+ return ERROR_OK;
if (!target->dbg_msg_enabled)
return ERROR_OK;
/* Configure core debug access */
cortex_a8_init_debug_access(target);
- target->type->examined = 1;
+ target_set_examined(target);
return retval;
}
}
-static int cortex_a8_init_target(struct command_context_s *cmd_ctx,
+static int cortex_a8_init_target(struct command_context *cmd_ctx,
struct target *target)
{
cortex_a8_build_reg_cache(target);
int cortex_a8_init_arch_info(struct target *target,
struct cortex_a8_common *cortex_a8, struct jtag_tap *tap)
{
- struct arm *armv4_5;
- struct armv7a_common *armv7a;
-
- armv7a = &cortex_a8->armv7a_common;
- armv4_5 = &armv7a->armv4_5_common;
+ struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
+ struct arm *armv4_5 = &armv7a->armv4_5_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
+ /* REVISIT v7a setup should be in a v7a-specific routine */
+ armv4_5_init_arch_info(target, armv4_5);
+ armv7a->common_magic = ARMV7_COMMON_MAGIC;
+
/* Setup struct cortex_a8_common */
cortex_a8->common_magic = CORTEX_A8_COMMON_MAGIC;
armv4_5->arch_info = armv7a;
- armv4_5_init_arch_info(target, armv4_5);
-
/* prepare JTAG information for the new target */
cortex_a8->jtag_info.tap = tap;
cortex_a8->jtag_info.scann_size = 4;
}
-static int cortex_a8_register_commands(struct command_context_s *cmd_ctx)
+static int cortex_a8_register_commands(struct command_context *cmd_ctx)
{
- command_t *cortex_a8_cmd;
+ struct command *cortex_a8_cmd;
int retval = ERROR_OK;
armv4_5_register_commands(cmd_ctx);
.read_memory = cortex_a8_read_memory,
.write_memory = cortex_a8_write_memory,
.bulk_write_memory = cortex_a8_bulk_write_memory,
- .checksum_memory = arm7_9_checksum_memory,
- .blank_check_memory = arm7_9_blank_check_memory,
+
+ .checksum_memory = arm_checksum_memory,
+ .blank_check_memory = arm_blank_check_memory,
.run_algorithm = armv4_5_run_algorithm,