/* Resync breakpoint registers */
- /* Since this is likley called from init or reset, update targtet state information*/
+ /* Since this is likely called from init or reset, update target state information*/
retval = cortex_a8_poll(target);
return retval;
/*
- * Cortex-A8 Breakpoint and watchpoint fuctions
+ * Cortex-A8 Breakpoint and watchpoint functions
*/
/* Setup hardware Breakpoint Register Pair */
struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
#if 0
-/* It is perfectly possible to remove brakpoints while the taget is running */
+/* It is perfectly possible to remove breakpoints while the target is running */
if (target->state != TARGET_HALTED)
{
LOG_WARNING("target not halted");
/*
- * Cortex-A8 Reset fuctions
+ * Cortex-A8 Reset functions
*/
static int cortex_a8_assert_reset(struct target *target)
{
int enabled = 0;
uint32_t virt, phys;
+ int retval;
/* cortex_a8 handles unaligned memory access */
// ??? dap_ap_select(swjdp, swjdp_memoryap);
LOG_DEBUG("Reading memory at address 0x%x; size %d; count %d", address, size, count);
- cortex_a8_mmu(target, &enabled);
+ retval = cortex_a8_mmu(target, &enabled);
+ if (retval != ERROR_OK)
+ return retval;
+
if(enabled)
{
virt = address;
{
int enabled = 0;
uint32_t virt, phys;
+ int retval;
// ??? dap_ap_select(swjdp, swjdp_memoryap);
LOG_DEBUG("Writing memory to address 0x%x; size %d; count %d", address, size, count);
- cortex_a8_mmu(target, &enabled);
+ retval = cortex_a8_mmu(target, &enabled);
+ if (retval != ERROR_OK)
+ return retval;
if(enabled)
{
virt = address;
2, 0, /* CRn, CRm */
&ttb);
}
- /* finaly we don't know whose ttb to use: user or kernel */
+ /* finally we don't know whose ttb to use: user or kernel */
else
LOG_ERROR("Don't know how to get ttb for current mode!!!");