target: create/use register_cache_invalidate()

[openocd.git] / src / target / cortex_a8.c

diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index d62740c2716294f922c11298b76c4f4b0f96275d..d02fee9e17affa30f904c726d8a4913e9b59d9dc 100644 (file)
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -545,7 +545,7 @@ static int cortex_a8_resume(struct target *target, int current,
        target->state = TARGET_RUNNING;
 
        /* registers are now invalid */
-       armv4_5_invalidate_core_regs(target);
+       register_cache_invalidate(armv4_5->core_cache);
 
        if (!debug_execution)
        {
@@ -1182,11 +1182,12 @@ static int cortex_a8_remove_breakpoint(struct target *target, struct breakpoint
 
 static int cortex_a8_assert_reset(struct target *target)
 {
+       struct armv7a_common *armv7a = target_to_armv7a(target);
 
        LOG_DEBUG(" ");
 
        /* registers are now invalid */
-       armv4_5_invalidate_core_regs(target);
+       register_cache_invalidate(armv7a->armv4_5_common.core_cache);
 
        target->state = TARGET_RESET;
 
@@ -1362,7 +1363,7 @@ static int cortex_a8_handle_target_request(void *priv)
  * Cortex-A8 target information and configuration
  */
 
-static int cortex_a8_examine(struct target *target)
+static int cortex_a8_examine_first(struct target *target)
 {
        struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
        struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
@@ -1447,10 +1448,21 @@ static int cortex_a8_examine(struct target *target)
        LOG_DEBUG("Configured %i hw breakpoint pairs and %i hw watchpoint pairs",
                        cortex_a8->brp_num , cortex_a8->wrp_num);
 
-       /* Configure core debug access */
-       cortex_a8_init_debug_access(target);
-
        target_set_examined(target);
+       return ERROR_OK;
+}
+
+static int cortex_a8_examine(struct target *target)
+{
+       int retval = ERROR_OK;
+
+       /* don't re-probe hardware after each reset */
+       if (!target_was_examined(target))
+               retval = cortex_a8_examine_first(target);
+
+       /* Configure core debug access */
+       if (retval == ERROR_OK)
+               retval = cortex_a8_init_debug_access(target);
 
        return retval;
 }