/* NOTE: most of this should work fine for the Cortex-M1 and
* Cortex-M0 cores too, although they're ARMv6-M not ARMv7-M.
- * Some differences: M0/M1 doesn't have FBP remapping or the
+ * Some differences: M0/M1 doesn't have FPB remapping or the
* DWT tracing/profiling support. (So the cycle counter will
* not be usable; the other stuff isn't currently used here.)
*
return retval;
/* Paranoia: evidently some (early?) chips don't preserve all the
- * debug state (including FBP, DWT, etc) across reset...
+ * debug state (including FPB, DWT, etc) across reset...
*/
/* Enable FPB */
retval = ERROR_OK;
} else {
/* Use a standard Cortex-M3 software reset mechanism.
- * We default to using VECRESET as it is supported on all current cores.
+ * We default to using VECRESET as it is supported on all current cores
+ * (except Cortex-M0, M0+ and M1 which support SYSRESETREQ only!)
* This has the disadvantage of not resetting the peripherals, so a
* reset-init event handler is needed to perform any peripheral resets.
*/
+ if (!cortex_m->vectreset_supported
+ && reset_config == CORTEX_M_RESET_VECTRESET) {
+ reset_config = CORTEX_M_RESET_SYSRESETREQ;
+ LOG_WARNING("VECTRESET is not supported on this Cortex-M core, using SYSRESETREQ instead.");
+ LOG_WARNING("Set 'cortex_m reset_config sysresetreq'.");
+ }
+
LOG_DEBUG("Using Cortex-M %s", (reset_config == CORTEX_M_RESET_SYSRESETREQ)
? "SYSRESETREQ" : "VECTRESET");
{
struct cortex_m_common *cortex_m = target_to_cm(target);
- /* REVISIT why check? FBP can be updated with core running ... */
+ /* REVISIT why check? FPB can be updated with core running ... */
if (target->state != TARGET_HALTED) {
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
LOG_DEBUG("cpuid: 0x%8.8" PRIx32 "", cpuid);
+ /* VECTRESET is not supported on Cortex-M0, M0+ and M1 */
+ cortex_m->vectreset_supported = i > 1;
+
if (i == 4) {
target_read_u32(target, MVFR0, &mvfr0);
target_read_u32(target, MVFR1, &mvfr1);
if (CMD_ARGC > 0) {
if (strcmp(*CMD_ARGV, "sysresetreq") == 0)
cortex_m->soft_reset_config = CORTEX_M_RESET_SYSRESETREQ;
- else if (strcmp(*CMD_ARGV, "vectreset") == 0)
- cortex_m->soft_reset_config = CORTEX_M_RESET_VECTRESET;
+
+ else if (strcmp(*CMD_ARGV, "vectreset") == 0) {
+ if (target_was_examined(target)
+ && !cortex_m->vectreset_supported)
+ LOG_WARNING("VECTRESET is not supported on your Cortex-M core!");
+ else
+ cortex_m->soft_reset_config = CORTEX_M_RESET_VECTRESET;
+
+ } else
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
switch (cortex_m->soft_reset_config) {
.handler = handle_cortex_m_reset_config_command,
.mode = COMMAND_ANY,
.help = "configure software reset handling",
- .usage = "['srst'|'sysresetreq'|'vectreset']",
+ .usage = "['sysresetreq'|'vectreset']",
},
COMMAND_REGISTRATION_DONE
};