cortex_m: remove old target breakpoints/watchpoints

[openocd.git] / src / target / cortex_m.c

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 3a823fe6f2e72f2e334b3e26d0d14bc13bbf70a2..7094b0708f250bf91daf8f77ebb7a54472915334 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1620,7 +1620,7 @@ static int cortex_m3_read_memory(struct target *target, uint32_t address,
        if (count && buffer) {
                switch (size) {
                        case 4:
-                               retval = mem_ap_read_buf_u32(swjdp, buffer, 4 * count, address);
+                               retval = mem_ap_read_buf_u32(swjdp, buffer, 4 * count, address, true);
                                break;
                        case 2:
                                retval = mem_ap_read_buf_u16(swjdp, buffer, 2 * count, address);
@@ -1650,7 +1650,7 @@ static int cortex_m3_write_memory(struct target *target, uint32_t address,
        if (count && buffer) {
                switch (size) {
                        case 4:
-                               retval = mem_ap_write_buf_u32(swjdp, buffer, 4 * count, address);
+                               retval = mem_ap_write_buf_u32(swjdp, buffer, 4 * count, address, true);
                                break;
                        case 2:
                                retval = mem_ap_write_buf_u16(swjdp, buffer, 2 * count, address);
@@ -1664,12 +1664,6 @@ static int cortex_m3_write_memory(struct target *target, uint32_t address,
        return retval;
 }
 
-static int cortex_m3_bulk_write_memory(struct target *target, uint32_t address,
-       uint32_t count, const uint8_t *buffer)
-{
-       return cortex_m3_write_memory(target, address, 4, count, buffer);
-}
-
 static int cortex_m3_init_target(struct command_context *cmd_ctx,
        struct target *target)
 {
@@ -1802,6 +1796,9 @@ fail1:
                for (j = 0; j < 3; j++, reg++)
                        cortex_m3_dwt_addreg(target, cache->reg_list + reg,
                                dwt_comp + 3 * i + j);
+
+               /* make sure we clear any watchpoints enabled on the target */
+               target_write_u32(target, comparator->dwt_comparator_address + 8, 0);
        }
 
        *register_get_last_cache_p(&target->reg_cache) = cache;
@@ -1893,6 +1890,9 @@ int cortex_m3_examine(struct target *target)
                        cortex_m3->fp_comparator_list[i].type =
                                (i < cortex_m3->fp_num_code) ? FPCR_CODE : FPCR_LITERAL;
                        cortex_m3->fp_comparator_list[i].fpcr_address = FP_COMP0 + 4 * i;
+
+                       /* make sure we clear any breakpoints enabled on the target */
+                       target_write_u32(target, cortex_m3->fp_comparator_list[i].fpcr_address, 0);
                }
                LOG_DEBUG("FPB fpcr 0x%" PRIx32 ", numcode %i, numlit %i",
                        fpcr,
@@ -2285,7 +2285,6 @@ struct target_type cortexm3_target = {
 
        .read_memory = cortex_m3_read_memory,
        .write_memory = cortex_m3_write_memory,
-       .bulk_write_memory = cortex_m3_bulk_write_memory,
        .checksum_memory = armv7m_checksum_memory,
        .blank_check_memory = armv7m_blank_check_memory,