}
if (cortex_m->dcb_dhcsr & S_RESET_ST) {
- /* check if still in reset */
- retval = mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m->dcb_dhcsr);
- if (retval != ERROR_OK)
- return retval;
-
- if (cortex_m->dcb_dhcsr & S_RESET_ST) {
- target->state = TARGET_RESET;
- return ERROR_OK;
- }
+ target->state = TARGET_RESET;
+ return ERROR_OK;
}
if (target->state == TARGET_RESET) {
*/
LOG_DEBUG("Exit from reset with dcb_dhcsr 0x%" PRIx32,
cortex_m->dcb_dhcsr);
- cortex_m_endreset_event(target);
+ retval = cortex_m_endreset_event(target);
+ if (retval != ERROR_OK) {
+ target->state = TARGET_UNKNOWN;
+ return retval;
+ }
target->state = TARGET_RUNNING;
prev_target_state = TARGET_RUNNING;
}
uint32_t i;
for (i = 0; i < (size * 4); i++) {
- cortex_m_dcc_read(target, &data, &ctrl);
+ int retval = cortex_m_dcc_read(target, &data, &ctrl);
+ if (retval != ERROR_OK)
+ return retval;
buffer[i] = data;
}
if (target->state == TARGET_RUNNING) {
uint8_t data;
uint8_t ctrl;
+ int retval;
- cortex_m_dcc_read(target, &data, &ctrl);
+ retval = cortex_m_dcc_read(target, &data, &ctrl);
+ if (retval != ERROR_OK)
+ return retval;
/* check if we have data */
if (ctrl & (1 << 0)) {
/* we assume target is quick enough */
request = data;
- cortex_m_dcc_read(target, &data, &ctrl);
- request |= (data << 8);
- cortex_m_dcc_read(target, &data, &ctrl);
- request |= (data << 16);
- cortex_m_dcc_read(target, &data, &ctrl);
- request |= (data << 24);
+ for (int i = 1; i <= 3; i++) {
+ retval = cortex_m_dcc_read(target, &data, &ctrl);
+ if (retval != ERROR_OK)
+ return retval;
+ request |= ((uint32_t)data << (i * 8));
+ }
target_request(target, request);
}
}