cortex_m: Use the correct method to access registers

[openocd.git] / src / target / cortex_m.c

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index a5230b75c737adabe6b8874e215282705ec693e5..d3b8f4e080f5c18583a191024e398e4b62990e8d 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -473,7 +473,7 @@ static int cortex_m_debug_entry(struct target *target)
 
        LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s",
                arm_mode_name(arm->core_mode),
-               *(uint32_t *)(arm->pc->value),
+               buf_get_u32(arm->pc->value, 0, 32),
                target_state_name(target));
 
        if (armv7m->post_debug_entry) {
@@ -1646,14 +1646,20 @@ static int cortex_m_init_target(struct command_context *cmd_ctx,
 struct dwt_reg_state {
        struct target *target;
        uint32_t addr;
-       uint32_t value;         /* scratch/cache */
+       uint8_t value[4];               /* scratch/cache */
 };
 
 static int cortex_m_dwt_get_reg(struct reg *reg)
 {
        struct dwt_reg_state *state = reg->arch_info;
 
-       return target_read_u32(state->target, state->addr, &state->value);
+       uint32_t tmp;
+       int retval = target_read_u32(state->target, state->addr, &tmp);
+       if (retval != ERROR_OK)
+               return retval;
+
+       buf_set_u32(state->value, 0, 32, tmp);
+       return ERROR_OK;
 }
 
 static int cortex_m_dwt_set_reg(struct reg *reg, uint8_t *buf)
@@ -1708,7 +1714,7 @@ static void cortex_m_dwt_addreg(struct target *t, struct reg *r, struct dwt_reg
 
        r->name = d->name;
        r->size = d->size;
-       r->value = &state->value;
+       r->value = state->value;
        r->arch_info = state;
        r->type = &dwt_reg_type;
 }