target: don't include "log.h" from "armv4_5.h"

[openocd.git] / src / target / cortex_m3.c

diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index eea9c880e02c1f3dcbaf99c029b9bf495cc587fe..e99e99c046b0a088bb380281b44cbe4ad11c46ef 100644 (file)
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -31,18 +31,18 @@
 #include "config.h"
 #endif
 
+#include "breakpoints.h"
 #include "cortex_m3.h"
 #include "target_request.h"
 #include "target_type.h"
 #include "arm_disassembler.h"
+#include "register.h"
 
 
 /* NOTE:  most of this should work fine for the Cortex-M1 and
  * Cortex-M0 cores too, although they're ARMv6-M not ARMv7-M.
  */
 
-#define ARRAY_SIZE(x)  ((int)(sizeof(x)/sizeof((x)[0])))
-
 
 /* forward declarations */
 static int cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint);
@@ -1435,7 +1435,7 @@ static int cortex_m3_bulk_write_memory(struct target *target, uint32_t address,
        return cortex_m3_write_memory(target, address, 4, count, buffer);
 }
 
-static int cortex_m3_init_target(struct command_context_s *cmd_ctx,
+static int cortex_m3_init_target(struct command_context *cmd_ctx,
                struct target *target)
 {
        armv7m_build_reg_cache(target);
@@ -1759,7 +1759,7 @@ static int cortex_m3_target_create(struct target *target, Jim_Interp *interp)
 
 /*--------------------------------------------------------------------------*/
 
-static int cortex_m3_verify_pointer(struct command_context_s *cmd_ctx,
+static int cortex_m3_verify_pointer(struct command_context *cmd_ctx,
                struct cortex_m3_common *cm3)
 {
        if (cm3->common_magic != CORTEX_M3_COMMON_MAGIC) {
@@ -1841,8 +1841,6 @@ COMMAND_HANDLER(handle_cortex_m3_vector_catch_command)
        struct swjdp_common *swjdp = &armv7m->swjdp_info;
        uint32_t demcr = 0;
        int retval;
-       int i;
-
        retval = cortex_m3_verify_pointer(cmd_ctx, cortex_m3);
        if (retval != ERROR_OK)
                return retval;
@@ -1863,6 +1861,7 @@ COMMAND_HANDLER(handle_cortex_m3_vector_catch_command)
                        }
                }
                while (argc-- > 0) {
+                       unsigned i;
                        for (i = 0; i < ARRAY_SIZE(vec_ids); i++) {
                                if (strcmp(args[argc], vec_ids[i].name) != 0)
                                        continue;
@@ -1883,7 +1882,7 @@ write:
                mem_ap_read_atomic_u32(swjdp, DCB_DEMCR, &demcr);
        }
 
-       for (i = 0; i < ARRAY_SIZE(vec_ids); i++)
+       for (unsigned i = 0; i < ARRAY_SIZE(vec_ids); i++)
                command_print(cmd_ctx, "%9s: %s", vec_ids[i].name,
                        (demcr & vec_ids[i].mask) ? "catch" : "ignore");
 
@@ -1928,10 +1927,10 @@ COMMAND_HANDLER(handle_cortex_m3_mask_interrupts_command)
        return ERROR_OK;
 }
 
-static int cortex_m3_register_commands(struct command_context_s *cmd_ctx)
+static int cortex_m3_register_commands(struct command_context *cmd_ctx)
 {
        int retval;
-       command_t *cortex_m3_cmd;
+       struct command *cortex_m3_cmd;
 
        retval = armv7m_register_commands(cmd_ctx);