+/**
+ * This function is not implemented.
+ * It returns an error in order to get OpenOCD to do read out the data
+ * and calculate the CRC, or try a binary comparison.
+ *
+ * @param target
+ * @param address Start address of the image.
+ * @param size In bytes.
+ * @param checksum
+ *
+ * @return
+ */
+static int dsp5680xx_checksum_memory(struct target *t, uint32_t a, uint32_t s,
+ uint32_t *checksum)
+{
+ return ERROR_FAIL;
+}
+
+/**
+ * Calculates a signature over @word_count words in the data from @buff16.
+ * The algorithm used is the same the FM uses, so the @return may be used to compare
+ * with the one generated by the FM module, and check if flashing was successful.
+ * This algorithm is based on the perl script available from the Freescale website at FAQ 25630.
+ *
+ * @param buff16
+ * @param word_count
+ *
+ * @return
+ */
+static int perl_crc(const uint8_t *buff8, uint32_t word_count)
+{
+ uint16_t checksum = 0xffff;
+
+ uint16_t data, fbmisr;
+
+ uint32_t i;
+
+ for (i = 0; i < word_count; i++) {
+ data = (buff8[2 * i] | (buff8[2 * i + 1] << 8));
+ fbmisr =
+ (checksum & 2) >> 1 ^ (checksum & 4) >> 2 ^ (checksum & 16)
+ >> 4 ^ (checksum & 0x8000) >> 15;
+ checksum = (data ^ ((checksum << 1) | fbmisr));
+ }
+ i--;
+ for (; !(i & 0x80000000); i--) {
+ data = (buff8[2 * i] | (buff8[2 * i + 1] << 8));
+ fbmisr =
+ (checksum & 2) >> 1 ^ (checksum & 4) >> 2 ^ (checksum & 16)
+ >> 4 ^ (checksum & 0x8000) >> 15;
+ checksum = (data ^ ((checksum << 1) | fbmisr));
+ }
+ return checksum;
+}
+
+/**
+ * Resets the SIM. (System Integration Modul).
+ *
+ * @param target
+ *
+ * @return
+ */
+int dsp5680xx_f_SIM_reset(struct target *target)
+{
+ int retval = ERROR_OK;
+
+ uint16_t sim_cmd = SIM_CMD_RESET;
+
+ uint32_t sim_addr;
+
+ if (strcmp(target->tap->chip, "dsp568013") == 0) {
+ sim_addr = MC568013_SIM_BASE_ADDR + S_FILE_DATA_OFFSET;
+ retval =
+ dsp5680xx_write(target, sim_addr, 1, 2,
+ (const uint8_t *)&sim_cmd);
+ err_check_propagate(retval);
+ }
+ return retval;
+}
+
+/**
+ * Halts the core and resets the SIM. (System Integration Modul).
+ *
+ * @param target
+ *
+ * @return
+ */
+static int dsp5680xx_soft_reset_halt(struct target *target)
+{
+ /* TODO is this what this function is expected to do...? */
+ int retval;
+
+ retval = dsp5680xx_halt(target);
+ err_check_propagate(retval);
+ retval = dsp5680xx_f_SIM_reset(target);
+ err_check_propagate(retval);
+ return retval;
+}
+
+int dsp5680xx_f_protect_check(struct target *target, uint16_t *protected)
+{
+ int retval;
+
+ check_halt_and_debug(target);
+ if (protected == NULL) {
+ const char *msg = "NULL pointer not valid.";
+
+ err_check(ERROR_FAIL,
+ DSP5680XX_ERROR_PROTECT_CHECK_INVALID_ARGS, msg);
+ }
+ retval =
+ dsp5680xx_read_16_single(target, HFM_BASE_ADDR | HFM_PROT,
+ (uint8_t *) protected, 0);
+ err_check_propagate(retval);
+ return retval;
+}
+
+/**
+ * Executes a command on the FM module.
+ * Some commands use the parameters @address and @data, others ignore them.
+ *
+ * @param target
+ * @param command Command to execute.
+ * @param address Command parameter.
+ * @param data Command parameter.
+ * @param hfm_ustat FM status register.
+ * @param pmem Address is P: (program) memory (@pmem == 1) or X: (dat) memory (@pmem == 0)
+ *
+ * @return
+ */
+static int dsp5680xx_f_ex(struct target *t, uint16_t c, uint32_t a, uint32_t d,
+ uint16_t *h, int p)
+{
+ struct target *target = t;
+
+ uint32_t command = c;
+
+ uint32_t address = a;
+
+ uint32_t data = d;
+
+ uint16_t *hfm_ustat = h;
+
+ int pmem = p;
+
+ int retval;
+
+ retval = core_load_TX_RX_high_addr_to_r0(target);
+ err_check_propagate(retval);
+ retval = core_move_long_to_r2(target, HFM_BASE_ADDR);
+ err_check_propagate(retval);
+ uint8_t i[2];
+
+ int watchdog = 100;
+
+ do {
+ retval = core_move_at_r2_disp_to_y0(target, HFM_USTAT); /* read HMF_USTAT */
+ err_check_propagate(retval);
+ retval = core_move_y0_at_r0(target);
+ err_check_propagate(retval);
+ retval = core_rx_upper_data(target, i);
+ err_check_propagate(retval);
+ if ((watchdog--) == 1) {
+ retval = ERROR_TARGET_FAILURE;
+ const char *msg =
+ "Timed out waiting for FM to finish old command.";
+ err_check(retval, DSP5680XX_ERROR_FM_BUSY, msg);
+ }
+ } while (!(i[0] & 0x40)); /* wait until current command is complete */
+
+ dsp5680xx_context.flush = 0;
+
+ /* write to HFM_CNFG (lock=0,select bank) - flash_desc.bank&0x03, 0x01 == 0x00, 0x01 ??? */
+ retval = core_move_value_at_r2_disp(target, 0x00, HFM_CNFG);
+ err_check_propagate(retval);
+ /* write to HMF_USTAT, clear PVIOL, ACCERR &BLANK bits */
+ retval = core_move_value_at_r2_disp(target, 0x04, HFM_USTAT);
+ err_check_propagate(retval);
+ /* clear only one bit at a time */
+ retval = core_move_value_at_r2_disp(target, 0x10, HFM_USTAT);
+ err_check_propagate(retval);
+ retval = core_move_value_at_r2_disp(target, 0x20, HFM_USTAT);
+ err_check_propagate(retval);
+ /* write to HMF_PROT, clear protection */
+ retval = core_move_value_at_r2_disp(target, 0x00, HFM_PROT);
+ err_check_propagate(retval);
+ /* write to HMF_PROTB, clear protection */
+ retval = core_move_value_at_r2_disp(target, 0x00, HFM_PROTB);
+ err_check_propagate(retval);
+ retval = core_move_value_to_y0(target, data);
+ err_check_propagate(retval);
+ /* write to the flash block */
+ retval = core_move_long_to_r3(target, address);
+ err_check_propagate(retval);
+ if (pmem) {
+ retval = core_move_y0_at_pr3_inc(target);
+ err_check_propagate(retval);
+ } else {
+ retval = core_move_y0_at_r3(target);
+ err_check_propagate(retval);
+ }
+ /* write command to the HFM_CMD reg */
+ retval = core_move_value_at_r2_disp(target, command, HFM_CMD);
+ err_check_propagate(retval);
+ /* start the command */
+ retval = core_move_value_at_r2_disp(target, 0x80, HFM_USTAT);
+ err_check_propagate(retval);
+
+ dsp5680xx_context.flush = 1;
+ retval = dsp5680xx_execute_queue();
+ err_check_propagate(retval);
+
+ watchdog = 100;
+ do {
+ /* read HMF_USTAT */
+ retval = core_move_at_r2_disp_to_y0(target, HFM_USTAT);
+ err_check_propagate(retval);
+ retval = core_move_y0_at_r0(target);
+ err_check_propagate(retval);
+ retval = core_rx_upper_data(target, i);
+ err_check_propagate(retval);
+ if ((watchdog--) == 1) {
+ retval = ERROR_TARGET_FAILURE;
+ err_check(retval, DSP5680XX_ERROR_FM_CMD_TIMED_OUT,
+ "FM execution did not finish.");
+ }
+ } while (!(i[0] & 0x40)); /* wait until the command is complete */
+ *hfm_ustat = ((i[0] << 8) | (i[1]));
+ if (i[0] & HFM_USTAT_MASK_PVIOL_ACCER) {
+ retval = ERROR_TARGET_FAILURE;
+ const char *msg =
+ "pviol and/or accer bits set. HFM command execution error";
+ err_check(retval, DSP5680XX_ERROR_FM_EXEC, msg);
+ }
+ return ERROR_OK;
+}
+
+/**
+ * Prior to the execution of any Flash module command, the Flash module Clock Divider (CLKDIV) register must be initialized. The values of this register determine the speed of the internal Flash Clock (FCLK). FCLK must be in the range of 150kHz ≤ FCLK ≤ 200kHz for proper operation of the Flash module. (Running FCLK too slowly wears out the module, while running it too fast under programs Flash leading to bit errors.)
+ *
+ * @param target
+ *
+ * @return
+ */
+static int set_fm_ck_div(struct target *target)
+{
+ uint8_t i[2];
+
+ int retval;
+
+ retval = core_move_long_to_r2(target, HFM_BASE_ADDR);
+ err_check_propagate(retval);
+ retval = core_load_TX_RX_high_addr_to_r0(target);
+ err_check_propagate(retval);
+ /* read HFM_CLKD */
+ retval = core_move_at_r2_to_y0(target);
+ err_check_propagate(retval);
+ retval = core_move_y0_at_r0(target);
+ err_check_propagate(retval);
+ retval = core_rx_upper_data(target, i);
+ err_check_propagate(retval);
+ unsigned int hfm_at_wrong_value = 0;
+
+ if ((i[0] & 0x7f) != HFM_CLK_DEFAULT) {
+ LOG_DEBUG("HFM CLK divisor contained incorrect value (0x%02X).",
+ i[0] & 0x7f);
+ hfm_at_wrong_value = 1;
+ } else {
+ LOG_DEBUG
+ ("HFM CLK divisor was already set to correct value (0x%02X).",
+ i[0] & 0x7f);
+ return ERROR_OK;
+ }
+ /* write HFM_CLKD */
+ retval = core_move_value_at_r2(target, HFM_CLK_DEFAULT);
+ err_check_propagate(retval);
+ /* verify HFM_CLKD */
+ retval = core_move_at_r2_to_y0(target);
+ err_check_propagate(retval);
+ retval = core_move_y0_at_r0(target);
+ err_check_propagate(retval);
+ retval = core_rx_upper_data(target, i);
+ err_check_propagate(retval);
+ if (i[0] != (0x80 | (HFM_CLK_DEFAULT & 0x7f))) {
+ retval = ERROR_TARGET_FAILURE;
+ err_check(retval, DSP5680XX_ERROR_FM_SET_CLK,
+ "Unable to set HFM CLK divisor.");
+ }
+ if (hfm_at_wrong_value)
+ LOG_DEBUG("HFM CLK divisor set to 0x%02x.", i[0] & 0x7f);
+ return ERROR_OK;
+}
+
+/**
+ * Executes the FM calculate signature command. The FM will calculate over the data from @address to @address + @words -1. The result is written to a register, then read out by this function and returned in @signature. The value @signature may be compared to the the one returned by perl_crc to verify the flash was written correctly.
+ *
+ * @param target
+ * @param address Start of flash array where the signature should be calculated.
+ * @param words Number of words over which the signature should be calculated.
+ * @param signature Value calculated by the FM.
+ *
+ * @return
+ */
+static int dsp5680xx_f_signature(struct target *t, uint32_t a, uint32_t words,
+ uint16_t *signature)
+{
+ struct target *target = t;
+
+ uint32_t address = a;
+
+ int retval;
+
+ uint16_t hfm_ustat;
+
+ if (!dsp5680xx_context.debug_mode_enabled) {
+ retval = eonce_enter_debug_mode_without_reset(target, NULL);
+ /*
+ * Generate error here, since it is not done in eonce_enter_debug_mode_without_reset
+ */
+ err_check(retval, DSP5680XX_ERROR_HALT,
+ "Failed to halt target.");
+ }
+ retval =
+ dsp5680xx_f_ex(target, HFM_CALCULATE_DATA_SIGNATURE, address, words,
+ &hfm_ustat, 1);
+ err_check_propagate(retval);
+ retval =
+ dsp5680xx_read_16_single(target, HFM_BASE_ADDR | HFM_DATA,
+ (uint8_t *) signature, 0);
+ return retval;
+}
+
+int dsp5680xx_f_erase_check(struct target *target, uint8_t *erased,
+ uint32_t sector)
+{
+ int retval;
+
+ uint16_t hfm_ustat;
+
+ uint32_t tmp;
+
+ if (!dsp5680xx_context.debug_mode_enabled) {
+ retval = dsp5680xx_halt(target);
+ err_check_propagate(retval);
+ }
+ retval = set_fm_ck_div(target);
+ err_check_propagate(retval);
+ /*
+ * Check if chip is already erased.
+ */
+ tmp = HFM_FLASH_BASE_ADDR + sector * HFM_SECTOR_SIZE / 2;
+ retval =
+ dsp5680xx_f_ex(target, HFM_ERASE_VERIFY, tmp, 0, &hfm_ustat, 1);
+ err_check_propagate(retval);
+ if (erased != NULL)
+ *erased = (uint8_t) (hfm_ustat & HFM_USTAT_MASK_BLANK);
+ return retval;
+}
+
+/**
+ * Executes the FM page erase command.
+ *
+ * @param target
+ * @param sector Page to erase.
+ * @param hfm_ustat FM module status register.
+ *
+ * @return
+ */
+static int erase_sector(struct target *target, int sector, uint16_t *hfm_ustat)
+{
+ int retval;
+
+ uint32_t tmp = HFM_FLASH_BASE_ADDR + sector * HFM_SECTOR_SIZE / 2;
+
+ retval = dsp5680xx_f_ex(target, HFM_PAGE_ERASE, tmp, 0, hfm_ustat, 1);
+ err_check_propagate(retval);
+ return retval;
+}
+
+/**
+ * Executes the FM mass erase command. Erases the flash array completely.
+ *
+ * @param target
+ * @param hfm_ustat FM module status register.
+ *
+ * @return
+ */
+static int mass_erase(struct target *target, uint16_t *hfm_ustat)
+{
+ int retval;
+
+ retval = dsp5680xx_f_ex(target, HFM_MASS_ERASE, 0, 0, hfm_ustat, 1);
+ return retval;
+}
+
+int dsp5680xx_f_erase(struct target *target, int first, int last)
+{
+ int retval;
+
+ if (!dsp5680xx_context.debug_mode_enabled) {
+ retval = dsp5680xx_halt(target);
+ err_check_propagate(retval);
+ }
+ /*
+ * Reset SIM
+ *
+ */
+ retval = dsp5680xx_f_SIM_reset(target);
+ err_check_propagate(retval);
+ /*
+ * Set hfmdiv
+ *
+ */
+ retval = set_fm_ck_div(target);
+ err_check_propagate(retval);
+