embeddedice_reg_t -> struct embeddedice_reg

[openocd.git] / src / target / embeddedice.c

diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index 7b20e12c0f1f40c34937043c4de82c684bc6a8dd..169ad2c302e733f1fafc6c2f9f63d55eb6aeaeee 100644 (file)
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -164,13 +164,13 @@ static int embeddedice_get_reg(reg_t *reg)
  * hardware support for vector_catch, single stepping, and monitor mode.
  */
 reg_cache_t *
-embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9)
+embeddedice_build_reg_cache(target_t *target, struct arm7_9_common *arm7_9)
 {
        int retval;
        reg_cache_t *reg_cache = malloc(sizeof(reg_cache_t));
        reg_t *reg_list = NULL;
-       embeddedice_reg_t *arch_info = NULL;
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct embeddedice_reg *arch_info = NULL;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
        int num_regs = ARRAY_SIZE(eice_regs);
        int i;
        int eice_version = 0;
@@ -186,7 +186,7 @@ embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9)
 
        /* the actual registers are kept in two arrays */
        reg_list = calloc(num_regs, sizeof(reg_t));
-       arch_info = calloc(num_regs, sizeof(embeddedice_reg_t));
+       arch_info = calloc(num_regs, sizeof(struct embeddedice_reg));
 
        /* fill in values for the reg cache */
        reg_cache->name = "EmbeddedICE registers";
@@ -303,7 +303,7 @@ embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9)
 int embeddedice_setup(target_t *target)
 {
        int retval;
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        /* Explicitly disable monitor mode.  For now we only support halting
         * debug ... we don't know how to talk with a resident debug monitor
@@ -331,9 +331,9 @@ int embeddedice_setup(target_t *target)
 int embeddedice_read_reg_w_check(reg_t *reg,
                uint8_t *check_value, uint8_t *check_mask)
 {
-       embeddedice_reg_t *ice_reg = reg->arch_info;
+       struct embeddedice_reg *ice_reg = reg->arch_info;
        uint8_t reg_addr = ice_reg->addr & 0x1f;
-       scan_field_t fields[3];
+       struct scan_field fields[3];
        uint8_t field1_out[1];
        uint8_t field2_out[1];
 
@@ -396,9 +396,9 @@ int embeddedice_read_reg_w_check(reg_t *reg,
  * functional clock, so the 50+ JTAG clocks needed to receive the word
  * allow hundreds of instruction cycles (per word) in the target.
  */
-int embeddedice_receive(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size)
+int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size)
 {
-       scan_field_t fields[3];
+       struct scan_field fields[3];
        uint8_t field1_out[1];
        uint8_t field2_out[1];
 
@@ -487,7 +487,7 @@ int embeddedice_set_reg_w_exec(reg_t *reg, uint8_t *buf)
  */
 void embeddedice_write_reg(reg_t *reg, uint32_t value)
 {
-       embeddedice_reg_t *ice_reg = reg->arch_info;
+       struct embeddedice_reg *ice_reg = reg->arch_info;
 
        LOG_DEBUG("%i: 0x%8.8" PRIx32 "", ice_reg->addr, value);
 
@@ -517,9 +517,9 @@ void embeddedice_store_reg(reg_t *reg)
  * functional clock, so the 50+ JTAG clocks needed to receive the word
  * allow hundreds of instruction cycles (per word) in the target.
  */
-int embeddedice_send(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size)
+int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size)
 {
-       scan_field_t fields[3];
+       struct scan_field fields[3];
        uint8_t field0_out[4];
        uint8_t field1_out[1];
        uint8_t field2_out[1];
@@ -562,9 +562,9 @@ int embeddedice_send(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size)
 /**
  * Poll DCC control register until read or write handshake completes.
  */
-int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, uint32_t timeout)
+int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout)
 {
-       scan_field_t fields[3];
+       struct scan_field fields[3];
        uint8_t field0_in[4];
        uint8_t field1_out[1];
        uint8_t field2_out[1];