Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
in_handler in_check_mask and in_check_value now removed from field. Last big patch...
[openocd.git] / src / target / embeddedice.c
diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index 15beb9f44dfd02a1008bc079633911fe7da85781..892e82641e93d97b00b77e464e44bd8404da8672 100644 (file)
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -42,15 +42,17 @@
 
 #include <stdlib.h>
 
-bitfield_desc_t embeddedice_comms_ctrl_bitfield_desc[] =
+#if 0
+static bitfield_desc_t embeddedice_comms_ctrl_bitfield_desc[] =
 {
        {"R", 1},
        {"W", 1},
        {"reserved", 26},
        {"version", 4}
 };
+#endif
 
-int embeddedice_reg_arch_info[] =
+static int embeddedice_reg_arch_info[] =
 {
        0x0, 0x1, 0x4, 0x5,
        0x8, 0x9, 0xa, 0xb, 0xc, 0xd,
@@ -58,7 +60,7 @@ int embeddedice_reg_arch_info[] =
        0x2
 };
 
-char* embeddedice_reg_list[] =
+static char* embeddedice_reg_list[] =
 {
        "debug_ctrl",
        "debug_status",
@@ -83,9 +85,9 @@ char* embeddedice_reg_list[] =
        "vector catch"
 };
 
-int embeddedice_reg_arch_type = -1;
+static int embeddedice_reg_arch_type = -1;
 
-int embeddedice_get_reg(reg_t *reg);
+static int embeddedice_get_reg(reg_t *reg);
 
 reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9)
 {
@@ -215,7 +217,7 @@ int embeddedice_setup(target_t *target)
        return jtag_execute_queue();
 }
 
-int embeddedice_get_reg(reg_t *reg)
+static int embeddedice_get_reg(reg_t *reg)
 {
        int retval;
        if ((retval = embeddedice_read_reg(reg)) != ERROR_OK)
@@ -249,39 +251,26 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        fields[0].tap = ice_reg->jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = reg->value;
-       fields[0].out_mask = NULL;
        fields[0].in_value = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
+       
 
        fields[1].tap = ice_reg->jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
        buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
-       fields[1].out_mask = NULL;
        fields[1].in_value = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
+       
 
        fields[2].tap = ice_reg->jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
        buf_set_u32(fields[2].out_value, 0, 1, 0);
-       fields[2].out_mask = NULL;
        fields[2].in_value = NULL;
-       fields[2].in_check_value = NULL;
-       fields[2].in_check_mask = NULL;
-       fields[2].in_handler = NULL;
-       fields[2].in_handler_priv = NULL;
+       
 
        jtag_add_dr_scan(3, fields, TAP_INVALID);
 
        fields[0].in_value = reg->value;
-       jtag_set_check_value(fields+0, check_value, check_mask, NULL);
 
        /* when reading the DCC data register, leaving the address field set to
         * EICE_COMMS_DATA would read the register twice
@@ -291,6 +280,8 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 
        jtag_add_dr_scan(3, fields, TAP_INVALID);
 
+       jtag_check_value_mask(fields+0, check_value, check_mask);
+
        return ERROR_OK;
 }
 
@@ -311,34 +302,23 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
        fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
-       fields[0].out_mask = NULL;
-       fields[0].in_value = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
+       u8 tmp[4];
+       fields[0].in_value = tmp;
+       
 
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_DATA]);
-       fields[1].out_mask = NULL;
        fields[1].in_value = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
+       
 
        fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
        buf_set_u32(fields[2].out_value, 0, 1, 0);
-       fields[2].out_mask = NULL;
        fields[2].in_value = NULL;
-       fields[2].in_check_value = NULL;
-       fields[2].in_check_mask = NULL;
-       fields[2].in_handler = NULL;
-       fields[2].in_handler_priv = NULL;
+       
 
        jtag_add_dr_scan(3, fields, TAP_INVALID);
 
@@ -350,9 +330,9 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
                if (size == 1)
                        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
 
-               fields[0].in_handler = arm_jtag_buf_to_u32;
-               fields[0].in_handler_priv = data;
-               jtag_add_dr_scan(3, fields, TAP_INVALID);
+               jtag_add_dr_scan_now(3, fields, TAP_INVALID);
+
+               *data = le_to_h_u32(tmp);
 
                data++;
                size--;
@@ -428,34 +408,34 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
        fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = field0_out;
-       fields[0].out_mask = NULL;
+
        fields[0].in_value = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
+
+
+       
+
 
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_DATA]);
-       fields[1].out_mask = NULL;
+
        fields[1].in_value = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
+
+
+       
+
 
        fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
        buf_set_u32(fields[2].out_value, 0, 1, 1);
-       fields[2].out_mask = NULL;
+
        fields[2].in_value = NULL;
-       fields[2].in_check_value = NULL;
-       fields[2].in_check_mask = NULL;
-       fields[2].in_handler = NULL;
-       fields[2].in_handler_priv = NULL;
+
+
+       
+
 
        while (size > 0)
        {
@@ -497,34 +477,34 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
        fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
-       fields[0].out_mask = NULL;
+
        fields[0].in_value = field0_in;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
+
+
+       
+
 
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 5;
        fields[1].out_value = field1_out;
        buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
-       fields[1].out_mask = NULL;
+
        fields[1].in_value = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
+
+
+       
+
 
        fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = field2_out;
        buf_set_u32(fields[2].out_value, 0, 1, 0);
-       fields[2].out_mask = NULL;
+
        fields[2].in_value = NULL;
-       fields[2].in_check_value = NULL;
-       fields[2].in_check_mask = NULL;
-       fields[2].in_handler = NULL;
-       fields[2].in_handler_priv = NULL;
+
+
+       
+
 
        jtag_add_dr_scan(3, fields, TAP_INVALID);
        gettimeofday(&lap, NULL);
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)