reg_cache_t -> struct reg_cache

[openocd.git] / src / target / etb.c

diff --git a/src/target/etb.c b/src/target/etb.c
index 41312bedd381dbbebbbdbfd9fd1c9f93baf5d589..8f1c67aa839047f22c3a69f9fed372345823dbf6 100644 (file)
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -21,7 +21,7 @@
 #include "config.h"
 #endif
 
-#include "arm7_9_common.h"
+#include "armv4_5.h"
 #include "etb.h"
 
 
@@ -44,7 +44,7 @@ static int etb_get_reg(reg_t *reg);
 
 static int etb_set_instr(etb_t *etb, uint32_t new_instr)
 {
-       jtag_tap_t *tap;
+       struct jtag_tap *tap;
 
        tap = etb->tap;
        if (tap == NULL)
@@ -52,7 +52,7 @@ static int etb_set_instr(etb_t *etb, uint32_t new_instr)
 
        if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
        {
-               scan_field_t field;
+               struct scan_field field;
 
                field.tap = tap;
                field.num_bits = tap->ir_length;
@@ -73,7 +73,7 @@ static int etb_scann(etb_t *etb, uint32_t new_scan_chain)
 {
        if (etb->cur_scan_chain != new_scan_chain)
        {
-               scan_field_t field;
+               struct scan_field field;
 
                field.tap = etb->tap;
                field.num_bits = 5;
@@ -121,11 +121,11 @@ static int etb_get_reg(reg_t *reg)
        return ERROR_OK;
 }
 
-reg_cache_t* etb_build_reg_cache(etb_t *etb)
+struct reg_cache* etb_build_reg_cache(etb_t *etb)
 {
-       reg_cache_t *reg_cache = malloc(sizeof(reg_cache_t));
+       struct reg_cache *reg_cache = malloc(sizeof(struct reg_cache));
        reg_t *reg_list = NULL;
-       etb_reg_t *arch_info = NULL;
+       struct etb_reg *arch_info = NULL;
        int num_regs = 9;
        int i;
 
@@ -135,7 +135,7 @@ reg_cache_t* etb_build_reg_cache(etb_t *etb)
 
        /* the actual registers are kept in two arrays */
        reg_list = calloc(num_regs, sizeof(reg_t));
-       arch_info = calloc(num_regs, sizeof(etb_reg_t));
+       arch_info = calloc(num_regs, sizeof(struct etb_reg));
 
        /* fill in values for the reg cache */
        reg_cache->name = "etb registers";
@@ -173,7 +173,7 @@ static void etb_getbuf(jtag_callback_data_t arg)
 
 static int etb_read_ram(etb_t *etb, uint32_t *data, int num_frames)
 {
-       scan_field_t fields[3];
+       struct scan_field fields[3];
        int i;
 
        jtag_set_end_state(TAP_IDLE);
@@ -227,9 +227,9 @@ static int etb_read_ram(etb_t *etb, uint32_t *data, int num_frames)
 static int etb_read_reg_w_check(reg_t *reg,
                uint8_t* check_value, uint8_t* check_mask)
 {
-       etb_reg_t *etb_reg = reg->arch_info;
+       struct etb_reg *etb_reg = reg->arch_info;
        uint8_t reg_addr = etb_reg->addr & 0x7f;
-       scan_field_t fields[3];
+       struct scan_field fields[3];
 
        LOG_DEBUG("%i", (int)(etb_reg->addr));
 
@@ -313,9 +313,9 @@ static int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf)
 
 static int etb_write_reg(reg_t *reg, uint32_t value)
 {
-       etb_reg_t *etb_reg = reg->arch_info;
+       struct etb_reg *etb_reg = reg->arch_info;
        uint8_t reg_addr = etb_reg->addr & 0x7f;
-       scan_field_t fields[3];
+       struct scan_field fields[3];
 
        LOG_DEBUG("%i: 0x%8.8" PRIx32 "", (int)(etb_reg->addr), value);
 
@@ -349,12 +349,11 @@ static int etb_write_reg(reg_t *reg, uint32_t value)
        return ERROR_OK;
 }
 
-static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etb_config_command)
 {
        target_t *target;
-       jtag_tap_t *tap;
-       armv4_5_common_t *armv4_5;
-       arm7_9_common_t *arm7_9;
+       struct jtag_tap *tap;
+       struct arm *arm;
 
        if (argc != 2)
        {
@@ -369,9 +368,10 @@ static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cm
                return ERROR_FAIL;
        }
 
-       if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+       arm = target_to_arm(target);
+       if (!is_arm(arm))
        {
-               command_print(cmd_ctx, "ETB: current target isn't an ARM7/ARM9 target");
+               command_print(cmd_ctx, "ETB: '%s' isn't an ARM", args[0]);
                return ERROR_FAIL;
        }
 
@@ -382,11 +382,11 @@ static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cm
                return ERROR_FAIL;
        }
 
-       if (arm7_9->etm_ctx)
+       if (arm->etm)
        {
                etb_t *etb = malloc(sizeof(etb_t));
 
-               arm7_9->etm_ctx->capture_driver_priv = etb;
+               arm->etm->capture_driver_priv = etb;
 
                etb->tap  = tap;
                etb->cur_scan_chain = 0xffffffff;
@@ -527,7 +527,7 @@ static int etb_read_trace(etm_context_t *etm_ctx)
        else
                etm_ctx->trace_depth = num_frames;
 
-       etm_ctx->trace_data = malloc(sizeof(etmv1_trace_data_t) * etm_ctx->trace_depth);
+       etm_ctx->trace_data = malloc(sizeof(struct etmv1_trace_data) * etm_ctx->trace_depth);
 
        for (i = 0, j = 0; i < num_frames; i++)
        {
@@ -682,7 +682,7 @@ static int etb_stop_capture(etm_context_t *etm_ctx)
        return ERROR_OK;
 }
 
-etm_capture_driver_t etb_capture_driver =
+struct etm_capture_driver etb_capture_driver =
 {
        .name = "etb",
        .register_commands = etb_register_commands,