/* figure ETM version then add base registers */
if (config & (1 << 31)) {
- bcd_vers = 0x20;
LOG_WARNING("ETMv2+ support is incomplete");
/* REVISIT more registers may exist; they may now be
if (etm_reg->reg_info->mode == WO) {
LOG_ERROR("BUG: can't read write-only register %s", r->name);
- return ERROR_INVALID_ARGUMENTS;
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
LOG_DEBUG("%s (%u)", r->name, reg_addr);
if (etm_reg->reg_info->mode == RO) {
LOG_ERROR("BUG: can't write read--only register %s", r->name);
- return ERROR_INVALID_ARGUMENTS;
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
LOG_DEBUG("%s (%u): 0x%8.8" PRIx32 "", r->name, reg_addr, value);
ctx->current_pc - ctx->image->sections[section].base_address,
4, buf, &size_read)) != ERROR_OK)
{
- LOG_ERROR("error while reading instruction: %i", retval);
+ LOG_ERROR("error while reading instruction");
return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
}
opcode = target_buffer_get_u32(ctx->target, buf);
ctx->current_pc - ctx->image->sections[section].base_address,
2, buf, &size_read)) != ERROR_OK)
{
- LOG_ERROR("error while reading instruction: %i", retval);
+ LOG_ERROR("error while reading instruction");
return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
}
opcode = target_buffer_get_u16(ctx->target, buf);
else
{
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[0]);
- return ERROR_INVALID_ARGUMENTS;
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
uint8_t context_id;
break;
default:
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[1]);
- return ERROR_INVALID_ARGUMENTS;
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
bool etmv1_cycle_accurate;
if ((retval = etmv1_analyze_trace(etm_ctx, CMD_CTX)) != ERROR_OK)
{
+ /* FIX! error should be reported inside etmv1_analyze_trace() */
switch (retval)
{
case ERROR_ETM_ANALYSIS_FAILED:
command_print(CMD_CTX, "no image available for trace analysis");
break;
default:
- command_print(CMD_CTX, "unknown error: %i", retval);
+ command_print(CMD_CTX, "unknown error");
}
}