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openocd: src/target: replace the GPL-2.0-or-later license tag
[openocd.git] / src / target / mips32.c
diff --git a/src/target/mips32.c b/src/target/mips32.c
index b5dbea312c2c53ec80b57c2461680ad9cc09d904..c89fb0901b97b7e7b0ade215893a4015a0db4bec 100644 (file)
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 /***************************************************************************
  *   Copyright (C) 2008 by Spencer Oliver                                  *
  *   spen@spen-soft.co.uk                                                  *
@@ -9,19 +11,6 @@
  *                                                                         *
  *   Copyright (C) 2011 by Drasko DRASKOVIC                                *
  *   drasko.draskovic@gmail.com                                            *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -190,8 +179,8 @@ static int mips32_set_core_reg(struct reg *reg, uint8_t *buf)
                return ERROR_TARGET_NOT_HALTED;
 
        buf_set_u32(reg->value, 0, 32, value);
-       reg->dirty = 1;
-       reg->valid = 1;
+       reg->dirty = true;
+       reg->valid = true;
 
        return ERROR_OK;
 }
@@ -208,8 +197,8 @@ static int mips32_read_core_reg(struct target *target, unsigned int num)
 
        reg_value = mips32->core_regs[num];
        buf_set_u32(mips32->core_cache->reg_list[num].value, 0, 32, reg_value);
-       mips32->core_cache->reg_list[num].valid = 1;
-       mips32->core_cache->reg_list[num].dirty = 0;
+       mips32->core_cache->reg_list[num].valid = true;
+       mips32->core_cache->reg_list[num].dirty = false;
 
        return ERROR_OK;
 }
@@ -226,9 +215,9 @@ static int mips32_write_core_reg(struct target *target, unsigned int num)
 
        reg_value = buf_get_u32(mips32->core_cache->reg_list[num].value, 0, 32);
        mips32->core_regs[num] = reg_value;
-       LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value);
-       mips32->core_cache->reg_list[num].valid = 1;
-       mips32->core_cache->reg_list[num].dirty = 0;
+       LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, reg_value);
+       mips32->core_cache->reg_list[num].valid = true;
+       mips32->core_cache->reg_list[num].dirty = false;
 
        return ERROR_OK;
 }
@@ -336,12 +325,12 @@ struct reg_cache *mips32_build_reg_cache(struct target *target)
 
                if (mips32_regs[i].flag == MIPS32_GDB_DUMMY_FP_REG) {
                        reg_list[i].value = mips32_gdb_dummy_fp_value;
-                       reg_list[i].valid = 1;
+                       reg_list[i].valid = true;
                        reg_list[i].arch_info = NULL;
                        register_init_dummy(&reg_list[i]);
                } else {
                        reg_list[i].value = calloc(1, 4);
-                       reg_list[i].valid = 0;
+                       reg_list[i].valid = false;
                        reg_list[i].type = &mips32_reg_type;
                        reg_list[i].arch_info = &arch_info[i];
 
@@ -352,7 +341,7 @@ struct reg_cache *mips32_build_reg_cache(struct target *target)
                                LOG_ERROR("unable to allocate reg type list");
                }
 
-               reg_list[i].dirty = 0;
+               reg_list[i].dirty = false;
 
                reg_list[i].group = mips32_regs[i].group;
                reg_list[i].number = i;
@@ -461,6 +450,8 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
        }
 
        for (int i = 0; i < num_mem_params; i++) {
+               if (mem_params[i].direction == PARAM_IN)
+                       continue;
                retval = target_write_buffer(target, mem_params[i].address,
                                mem_params[i].size, mem_params[i].value);
                if (retval != ERROR_OK)
@@ -468,7 +459,10 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
        }
 
        for (int i = 0; i < num_reg_params; i++) {
-               struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, 0);
+               if (reg_params[i].direction == PARAM_IN)
+                       continue;
+
+               struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, false);
 
                if (!reg) {
                        LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
@@ -502,7 +496,7 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
 
        for (int i = 0; i < num_reg_params; i++) {
                if (reg_params[i].direction != PARAM_OUT) {
-                       struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, 0);
+                       struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, false);
                        if (!reg) {
                                LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
                                return ERROR_COMMAND_SYNTAX_ERROR;
@@ -527,8 +521,8 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
                                mips32->core_cache->reg_list[i].name, context[i]);
                        buf_set_u32(mips32->core_cache->reg_list[i].value,
                                        0, 32, context[i]);
-                       mips32->core_cache->reg_list[i].valid = 1;
-                       mips32->core_cache->reg_list[i].dirty = 1;
+                       mips32->core_cache->reg_list[i].valid = true;
+                       mips32->core_cache->reg_list[i].dirty = true;
                }
        }
 
@@ -718,9 +712,9 @@ int mips32_read_config_regs(struct target *target)
                                break;  /* no more config registers implemented */
                }
        else
-               return ERROR_OK;        /* already succesfully read */
+               return ERROR_OK;        /* already successfully read */
 
-       LOG_DEBUG("read  %"PRId32" config registers", ejtag_info->config_regs);
+       LOG_DEBUG("read  %"PRIu32" config registers", ejtag_info->config_regs);
 
        if (ejtag_info->impcode & EJTAG_IMP_MIPS16) {
                mips32->isa_imp = MIPS32_MIPS16;
@@ -900,11 +894,11 @@ cleanup:
        return 1;       /* only one block has been checked */
 }
 
-static int mips32_verify_pointer(struct command_context *cmd_ctx,
+static int mips32_verify_pointer(struct command_invocation *cmd,
                struct mips32_common *mips32)
 {
        if (mips32->common_magic != MIPS32_COMMON_MAGIC) {
-               command_print(cmd_ctx, "target is not an MIPS32");
+               command_print(cmd, "target is not an MIPS32");
                return ERROR_TARGET_INVALID;
        }
        return ERROR_OK;
@@ -922,12 +916,12 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
 
-       retval = mips32_verify_pointer(CMD_CTX, mips32);
+       retval = mips32_verify_pointer(CMD, mips32);
        if (retval != ERROR_OK)
                return retval;
 
        if (target->state != TARGET_HALTED) {
-               command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
+               command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
                return ERROR_OK;
        }
 
@@ -944,12 +938,12 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
 
                        retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
                        if (retval != ERROR_OK) {
-                               command_print(CMD_CTX,
-                                               "couldn't access reg %" PRIi32,
+                               command_print(CMD,
+                                               "couldn't access reg %" PRIu32,
                                                cp0_reg);
                                return ERROR_OK;
                        }
-                       command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+                       command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32,
                                        cp0_reg, cp0_sel, value);
 
                } else if (CMD_ARGC == 3) {
@@ -957,12 +951,12 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
                        COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], value);
                        retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel);
                        if (retval != ERROR_OK) {
-                               command_print(CMD_CTX,
-                                               "couldn't access cp0 reg %" PRIi32 ", select %" PRIi32,
+                               command_print(CMD,
+                                               "couldn't access cp0 reg %" PRIu32 ", select %" PRIu32,
                                                cp0_reg,  cp0_sel);
                                return ERROR_OK;
                        }
-                       command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+                       command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32,
                                        cp0_reg, cp0_sel, value);
                }
        }
@@ -981,13 +975,13 @@ COMMAND_HANDLER(mips32_handle_scan_delay_command)
        else if (CMD_ARGC > 1)
                        return ERROR_COMMAND_SYNTAX_ERROR;
 
-       command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay);
+       command_print(CMD, "scan delay: %d nsec", ejtag_info->scan_delay);
        if (ejtag_info->scan_delay >= MIPS32_SCAN_DELAY_LEGACY_MODE) {
                ejtag_info->mode = 0;
-               command_print(CMD_CTX, "running in legacy mode");
+               command_print(CMD, "running in legacy mode");
        } else {
                ejtag_info->mode = 1;
-               command_print(CMD_CTX, "running in fast queued mode");
+               command_print(CMD, "running in fast queued mode");
        }
 
        return ERROR_OK;
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