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armv7m: add gdb target description support
[openocd.git] / src / target / mips32_dmaacc.c
diff --git a/src/target/mips32_dmaacc.c b/src/target/mips32_dmaacc.c
index ddcfb97d781c3cf9f73f7d1c0bac6f3b256ce404..eb6cd8ce112791a7d4f68dfbf020713464ec8da6 100644 (file)
--- a/src/target/mips32_dmaacc.c
+++ b/src/target/mips32_dmaacc.c
@@ -20,16 +20,29 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  ***************************************************************************/
+
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 
-#include <string.h>
-#include "log.h"
-#include "mips32.h"
 #include "mips32_dmaacc.h"
+#include <helper/time_support.h>
+
+static int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info,
+               uint32_t addr, int count, uint8_t *buf);
+static int mips32_dmaacc_read_mem16(struct mips_ejtag *ejtag_info,
+               uint32_t addr, int count, uint16_t *buf);
+static int mips32_dmaacc_read_mem32(struct mips_ejtag *ejtag_info,
+               uint32_t addr, int count, uint32_t *buf);
+
+static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info,
+               uint32_t addr, int count, uint8_t *buf);
+static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info,
+               uint32_t addr, int count, uint16_t *buf);
+static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info,
+               uint32_t addr, int count, uint32_t *buf);
 
 /*
  * The following logic shamelessly cloned from HairyDairyMaid's wrt54g_debrick
@@ -41,398 +54,409 @@
  * displaying/modifying memory and memory mapped registers.
  */
 
-static int ejtag_dma_read(mips_ejtag_t *ejtag_info, u32 addr, u32 *data)
+static int ejtag_dma_dstrt_poll(struct mips_ejtag *ejtag_info)
+{
+       uint32_t ejtag_ctrl;
+       int64_t start = timeval_ms();
+
+       do {
+               if (timeval_ms() - start > 1000) {
+                       LOG_ERROR("DMA time out");
+                       return -ETIMEDOUT;
+               }
+               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
+               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       return 0;
+}
+
+static int ejtag_dma_read(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
-       int   retries = RETRY_ATTEMPTS;
+       uint32_t v;
+       uint32_t ejtag_ctrl;
+       int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_read:
 
-       // Setup Address
+       /* Setup Address */
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
-       // Initiate DMA Read & set DSTRT
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       /* Initiate DMA Read & set DSTRT */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_WORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
-       // Wait for DSTRT to Clear
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       /* Wait for DSTRT to Clear */
+       ejtag_dma_dstrt_poll(ejtag_info);
 
-       // Read Data
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       /* Read Data */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, data);
 
-       // Clear DMA & Check DERR
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       /* Clear DMA & Check DERR */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       if (ejtag_ctrl  & EJTAG_CTRL_DERR)
-       {
+       if (ejtag_ctrl  & EJTAG_CTRL_DERR) {
                if (retries--) {
-                       printf("DMA Read Addr = %08x  Data = ERROR ON READ (retrying)\n", addr);
+                       LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ (retrying)", addr);
                        goto begin_ejtag_dma_read;
-               } else  printf("DMA Read Addr = %08x  Data = ERROR ON READ\n", addr);
+               } else
+                       LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ", addr);
                return ERROR_JTAG_DEVICE_ERROR;
        }
 
        return ERROR_OK;
 }
 
-static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, u32 addr, u16 *data)
+static int ejtag_dma_read_h(struct mips_ejtag *ejtag_info, uint32_t addr, uint16_t *data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
-       int   retries = RETRY_ATTEMPTS;
+       uint32_t v;
+       uint32_t ejtag_ctrl;
+       int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_read_h:
 
-       // Setup Address
+       /* Setup Address */
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
-       // Initiate DMA Read & set DSTRT
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
-       ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_HALFWORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
+       /* Initiate DMA Read & set DSTRT */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
+       ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_HALFWORD |
+                       EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
-       // Wait for DSTRT to Clear
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       /* Wait for DSTRT to Clear */
+       ejtag_dma_dstrt_poll(ejtag_info);
 
-       // Read Data
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       /* Read Data */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
-       // Clear DMA & Check DERR
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       /* Clear DMA & Check DERR */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       if (ejtag_ctrl  & EJTAG_CTRL_DERR)
-       {
+       if (ejtag_ctrl  & EJTAG_CTRL_DERR) {
                if (retries--) {
-                       printf("DMA Read Addr = %08x  Data = ERROR ON READ (retrying)\n", addr);
+                       LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ (retrying)", addr);
                        goto begin_ejtag_dma_read_h;
-               } else  printf("DMA Read Addr = %08x  Data = ERROR ON READ\n", addr);
+               } else
+                       LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ", addr);
                return ERROR_JTAG_DEVICE_ERROR;
        }
 
-       // Handle the bigendian/littleendian
-       if ( addr & 0x2 )  *data = (v>>16)&0xffff ;
-       else               *data = (v&0x0000ffff) ;
+       /* Handle the bigendian/littleendian */
+       if (addr & 0x2)
+               *data = (v >> 16) & 0xffff;
+       else
+               *data = (v & 0x0000ffff);
 
        return ERROR_OK;
 }
 
-static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, u32 addr, u8 *data)
+static int ejtag_dma_read_b(struct mips_ejtag *ejtag_info, uint32_t addr, uint8_t *data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
-       int   retries = RETRY_ATTEMPTS;
+       uint32_t v;
+       uint32_t ejtag_ctrl;
+       int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_read_b:
 
-       // Setup Address
+       /* Setup Address */
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
-       // Initiate DMA Read & set DSTRT
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       /* Initiate DMA Read & set DSTRT */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_BYTE | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
-       // Wait for DSTRT to Clear
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       /* Wait for DSTRT to Clear */
+       ejtag_dma_dstrt_poll(ejtag_info);
 
-       // Read Data
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       /* Read Data */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
-       // Clear DMA & Check DERR
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       /* Clear DMA & Check DERR */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       if (ejtag_ctrl  & EJTAG_CTRL_DERR)
-       {
+       if (ejtag_ctrl  & EJTAG_CTRL_DERR) {
                if (retries--) {
-                       printf("DMA Read Addr = %08x  Data = ERROR ON READ (retrying)\n", addr);
+                       LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ (retrying)", addr);
                        goto begin_ejtag_dma_read_b;
-               } else  printf("DMA Read Addr = %08x  Data = ERROR ON READ\n", addr);
+               } else
+                       LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ", addr);
                return ERROR_JTAG_DEVICE_ERROR;
        }
 
-       // Handle the bigendian/littleendian
-       switch(addr & 0x3) {
-       case 0:  *data =  v      & 0xff; break;
-       case 1:  *data = (v>>8)  & 0xff; break;
-       case 2:  *data = (v>>16) & 0xff; break;
-       case 3:  *data = (v>>24) & 0xff; break;
+       /* Handle the bigendian/littleendian */
+       switch (addr & 0x3) {
+               case 0:
+                       *data = v & 0xff;
+                       break;
+               case 1:
+                       *data = (v >> 8) & 0xff;
+                       break;
+               case 2:
+                       *data = (v >> 16) & 0xff;
+                       break;
+               case 3:
+                       *data = (v >> 24) & 0xff;
+                       break;
        }
 
        return ERROR_OK;
 }
 
-static int ejtag_dma_write(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
-       int   retries = RETRY_ATTEMPTS;
+       uint32_t v;
+       uint32_t ejtag_ctrl;
+       int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_write:
 
-       // Setup Address
+       /* Setup Address */
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
-       // Setup Data
+       /* Setup Data */
        v = data;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
-       // Initiate DMA Write & set DSTRT
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       /* Initiate DMA Write & set DSTRT */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_WORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
-       // Wait for DSTRT to Clear
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       /* Wait for DSTRT to Clear */
+       ejtag_dma_dstrt_poll(ejtag_info);
 
-       // Clear DMA & Check DERR
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       /* Clear DMA & Check DERR */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       if (ejtag_ctrl  & EJTAG_CTRL_DERR)
-       {
+       if (ejtag_ctrl  & EJTAG_CTRL_DERR) {
                if (retries--) {
-                       printf("DMA Write Addr = %08x  Data = ERROR ON WRITE (retrying)\n", addr);
+                       LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE (retrying)", addr);
                        goto begin_ejtag_dma_write;
-               } else  printf("DMA Write Addr = %08x  Data = ERROR ON WRITE\n", addr);
+               } else
+                       LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE", addr);
                return ERROR_JTAG_DEVICE_ERROR;
        }
 
        return ERROR_OK;
 }
 
-static int ejtag_dma_write_h(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write_h(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
-       int   retries = RETRY_ATTEMPTS;
-
+       uint32_t v;
+       uint32_t ejtag_ctrl;
+       int retries = RETRY_ATTEMPTS;
 
-       // Handle the bigendian/littleendian
+       /* Handle the bigendian/littleendian */
        data &= 0xffff;
-       data |= data<<16;
+       data |= data << 16;
 
 begin_ejtag_dma_write_h:
 
-       // Setup Address
+       /* Setup Address */
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
-       // Setup Data
+       /* Setup Data */
        v = data;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
-       // Initiate DMA Write & set DSTRT
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       /* Initiate DMA Write & set DSTRT */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_HALFWORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
-       // Wait for DSTRT to Clear
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       /* Wait for DSTRT to Clear */
+       ejtag_dma_dstrt_poll(ejtag_info);
 
-       // Clear DMA & Check DERR
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       /* Clear DMA & Check DERR */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       if (ejtag_ctrl  & EJTAG_CTRL_DERR)
-       {
+       if (ejtag_ctrl & EJTAG_CTRL_DERR) {
                if (retries--) {
-                       printf("DMA Write Addr = %08x  Data = ERROR ON WRITE (retrying)\n", addr);
+                       LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE (retrying)", addr);
                        goto begin_ejtag_dma_write_h;
-               } else  printf("DMA Write Addr = %08x  Data = ERROR ON WRITE\n", addr);
+               } else
+                       LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE", addr);
                return ERROR_JTAG_DEVICE_ERROR;
        }
 
        return ERROR_OK;
 }
 
-static int ejtag_dma_write_b(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write_b(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
 {
-       u32 v;
-       u32 ejtag_ctrl;
-       int   retries = RETRY_ATTEMPTS;
-
+       uint32_t v;
+       uint32_t ejtag_ctrl;
+       int retries = RETRY_ATTEMPTS;
 
-       // Handle the bigendian/littleendian
+       /* Handle the bigendian/littleendian */
        data &= 0xff;
-       data |= data<<8;
-       data |= data<<16;
+       data |= data << 8;
+       data |= data << 16;
 
 begin_ejtag_dma_write_b:
 
-       // Setup Address
+       /*  Setup Address*/
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
-       // Setup Data
+       /* Setup Data */
        v = data;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
-       // Initiate DMA Write & set DSTRT
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       /* Initiate DMA Write & set DSTRT */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_BYTE | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
-       // Wait for DSTRT to Clear
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       /* Wait for DSTRT to Clear */
+       ejtag_dma_dstrt_poll(ejtag_info);
 
-       // Clear DMA & Check DERR
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       /* Clear DMA & Check DERR */
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       if (ejtag_ctrl  & EJTAG_CTRL_DERR)
-       {
+       if (ejtag_ctrl & EJTAG_CTRL_DERR) {
                if (retries--) {
-                       printf("DMA Write Addr = %08x  Data = ERROR ON WRITE (retrying)\n", addr);
+                       LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE (retrying)", addr);
                        goto begin_ejtag_dma_write_b;
-               } else  printf("DMA Write Addr = %08x  Data = ERROR ON WRITE\n", addr);
+               } else
+                       LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE", addr);
                return ERROR_JTAG_DEVICE_ERROR;
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf)
+int mips32_dmaacc_read_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
 {
-       switch (size)
-       {
+       switch (size) {
                case 1:
-                       return mips32_dmaacc_read_mem8(ejtag_info, addr, count, (u8*)buf);
+                       return mips32_dmaacc_read_mem8(ejtag_info, addr, count, (uint8_t *)buf);
                case 2:
-                       return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (u16*)buf);
+                       return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (uint16_t *)buf);
                case 4:
-                       return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (u32*)buf);
+                       return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (uint32_t *)buf);
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf)
+static int mips32_dmaacc_read_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
 {
        int i;
        int     retval;
 
-       for(i=0; i<count; i++) {
-               if((retval=ejtag_dma_read(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               retval = ejtag_dma_read(ejtag_info, addr + i * sizeof(*buf), &buf[i]);
+               if (retval != ERROR_OK)
                        return retval;
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf)
+static int mips32_dmaacc_read_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
 {
        int i;
        int retval;
 
-       for(i=0; i<count; i++) {
-               if((retval=ejtag_dma_read_h(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               retval = ejtag_dma_read_h(ejtag_info, addr + i * sizeof(*buf), &buf[i]);
+               if (retval != ERROR_OK)
                        return retval;
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf)
+static int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
 {
        int i;
        int retval;
 
-       for(i=0; i<count; i++) {
-               if((retval=ejtag_dma_read_b(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               retval = ejtag_dma_read_b(ejtag_info, addr + i * sizeof(*buf), &buf[i]);
+               if (retval != ERROR_OK)
                        return retval;
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf)
+int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
 {
-       switch (size)
-       {
+       switch (size) {
                case 1:
-                       return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (u8*)buf);
+                       return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (uint8_t *)buf);
                case 2:
-                       return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(u16*)buf);
+                       return mips32_dmaacc_write_mem16(ejtag_info, addr, count, (uint16_t *)buf);
                case 4:
-                       return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (u32*)buf);
+                       return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (uint32_t *)buf);
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf)
+static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
 {
        int i;
        int retval;
 
-       for(i=0; i<count; i++) {
-               if((retval=ejtag_dma_write(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               retval = ejtag_dma_write(ejtag_info, addr + i * sizeof(*buf), buf[i]);
+               if (retval != ERROR_OK)
                        return retval;
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf)
+static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
 {
        int i;
        int retval;
 
-       for(i=0; i<count; i++) {
-               if((retval=ejtag_dma_write_h(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               retval = ejtag_dma_write_h(ejtag_info, addr + i * sizeof(*buf), buf[i]);
+               if (retval != ERROR_OK)
                        return retval;
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *buf)
+static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
 {
        int i;
        int retval;
 
-       for(i=0; i<count; i++) {
-               if((retval=ejtag_dma_write_b(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               retval = ejtag_dma_write_b(ejtag_info, addr + i * sizeof(*buf), buf[i]);
+               if (retval != ERROR_OK)
                        return retval;
        }
 
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