propagate return status of set_breakpoint() up call chain
[openocd.git] / src / target / mips_m4k.c
index f229690be556da3dc4e1598cb1a561999234b73f..62c484a98af2467d9db4107c067bb1911df3382d 100644 (file)
 #include "target_type.h"
 #include "register.h"
 
-/* cli handling */
-
-/* forward declarations */
-int mips_m4k_poll(struct target *target);
-int mips_m4k_halt(struct target *target);
-int mips_m4k_soft_reset_halt(struct target *target);
-int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
-int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints);
-int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int mips_m4k_init_target(struct command_context *cmd_ctx, struct target *target);
-int mips_m4k_target_create(struct target *target, Jim_Interp *interp);
-
-int mips_m4k_examine(struct target *target);
-int mips_m4k_assert_reset(struct target *target);
-int mips_m4k_deassert_reset(struct target *target);
-int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum);
-
-struct target_type mips_m4k_target =
-{
-       .name = "mips_m4k",
-
-       .poll = mips_m4k_poll,
-       .arch_state = mips32_arch_state,
-
-       .target_request_data = NULL,
-
-       .halt = mips_m4k_halt,
-       .resume = mips_m4k_resume,
-       .step = mips_m4k_step,
-
-       .assert_reset = mips_m4k_assert_reset,
-       .deassert_reset = mips_m4k_deassert_reset,
-       .soft_reset_halt = mips_m4k_soft_reset_halt,
-
-       .get_gdb_reg_list = mips32_get_gdb_reg_list,
-
-       .read_memory = mips_m4k_read_memory,
-       .write_memory = mips_m4k_write_memory,
-       .bulk_write_memory = mips_m4k_bulk_write_memory,
-       .checksum_memory = mips_m4k_checksum_memory,
-       .blank_check_memory = NULL,
-
-       .run_algorithm = mips32_run_algorithm,
-
-       .add_breakpoint = mips_m4k_add_breakpoint,
-       .remove_breakpoint = mips_m4k_remove_breakpoint,
-       .add_watchpoint = mips_m4k_add_watchpoint,
-       .remove_watchpoint = mips_m4k_remove_watchpoint,
-
-       .target_create = mips_m4k_target_create,
-       .init_target = mips_m4k_init_target,
-       .examine = mips_m4k_examine,
-};
-
-int mips_m4k_examine_debug_reason(struct target *target)
+static void mips_m4k_enable_breakpoints(struct target *target);
+static void mips_m4k_enable_watchpoints(struct target *target);
+static int mips_m4k_set_breakpoint(struct target *target,
+               struct breakpoint *breakpoint);
+static int mips_m4k_unset_breakpoint(struct target *target,
+               struct breakpoint *breakpoint);
+
+static int mips_m4k_examine_debug_reason(struct target *target)
 {
        uint32_t break_status;
        int retval;
@@ -107,12 +59,12 @@ int mips_m4k_examine_debug_reason(struct target *target)
                }
 
                /* get info about data breakpoint support */
-               if ((retval = target_read_u32(target, 0xFF302000, &break_status)) != ERROR_OK)
+               if ((retval = target_read_u32(target, EJTAG_DBS, &break_status)) != ERROR_OK)
                        return retval;
                if (break_status & 0x1f)
                {
                        /* we have halted on a  breakpoint */
-                       if ((retval = target_write_u32(target, 0xFF302000, 0)) != ERROR_OK)
+                       if ((retval = target_write_u32(target, EJTAG_DBS, 0)) != ERROR_OK)
                                return retval;
                        target->debug_reason = DBG_REASON_WATCHPOINT;
                }
@@ -121,16 +73,16 @@ int mips_m4k_examine_debug_reason(struct target *target)
        return ERROR_OK;
 }
 
-int mips_m4k_debug_entry(struct target *target)
+static int mips_m4k_debug_entry(struct target *target)
 {
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
        uint32_t debug_reg;
 
        /* read debug register */
        mips_ejtag_read_debug(ejtag_info, &debug_reg);
 
-       /* make sure break uit configured */
+       /* make sure break unit configured */
        mips32_configure_break_unit(target);
 
        /* attempt to find halt reason */
@@ -145,23 +97,29 @@ int mips_m4k_debug_entry(struct target *target)
 
        mips32_save_context(target);
 
+       /* default to mips32 isa, it will be changed below if required */
+       mips32->isa_mode = MIPS32_ISA_MIPS32;
+
+       if (ejtag_info->impcode & EJTAG_IMP_MIPS16) {
+               mips32->isa_mode = buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 1);
+       }
+
        LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s",
-               *(uint32_t*)(mips32->core_cache->reg_list[MIPS32_PC].value),
-                 target_state_name(target));
+                       buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32),
+                       target_state_name(target));
 
        return ERROR_OK;
 }
 
-int mips_m4k_poll(struct target *target)
+static int mips_m4k_poll(struct target *target)
 {
        int retval;
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
        uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl;
 
        /* read ejtag control reg */
-       jtag_set_end_state(TAP_IDLE);
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* clear this bit before handling polling
@@ -170,10 +128,9 @@ int mips_m4k_poll(struct target *target)
        {
                /* we have detected a reset, clear flag
                 * otherwise ejtag will not work */
-               jtag_set_end_state(TAP_IDLE);
                ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_ROCC;
 
-               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
                mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
                LOG_DEBUG("Reset Detected");
        }
@@ -183,8 +140,7 @@ int mips_m4k_poll(struct target *target)
        {
                if ((target->state == TARGET_RUNNING) || (target->state == TARGET_RESET))
                {
-                       jtag_set_end_state(TAP_IDLE);
-                       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
+                       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT);
 
                        target->state = TARGET_HALTED;
 
@@ -213,9 +169,9 @@ int mips_m4k_poll(struct target *target)
        return ERROR_OK;
 }
 
-int mips_m4k_halt(struct target *target)
+static int mips_m4k_halt(struct target *target)
 {
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
        LOG_DEBUG("target->state: %s",
@@ -258,41 +214,31 @@ int mips_m4k_halt(struct target *target)
        return ERROR_OK;
 }
 
-int mips_m4k_assert_reset(struct target *target)
+static int mips_m4k_assert_reset(struct target *target)
 {
-       struct mips32_common *mips32 = target->arch_info;
-       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
+       struct mips_m4k_common *mips_m4k = target_to_m4k(target);
+       struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info;
+       int assert_srst = 1;
 
        LOG_DEBUG("target->state: %s",
                target_state_name(target));
 
        enum reset_types jtag_reset_config = jtag_get_reset_config();
+
        if (!(jtag_reset_config & RESET_HAS_SRST))
-       {
-               LOG_ERROR("Can't assert SRST");
-               return ERROR_FAIL;
-       }
+               assert_srst = 0;
 
        if (target->reset_halt)
        {
                /* use hardware to catch reset */
-               jtag_set_end_state(TAP_IDLE);
-               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT, NULL);
+               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT);
        }
        else
        {
-               jtag_set_end_state(TAP_IDLE);
-               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
+               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT);
        }
 
-       if (strcmp(target->variant, "ejtag_srst") == 0)
-       {
-               uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST;
-               LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor...");
-               mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       }
-       else
+       if (assert_srst)
        {
                /* here we should issue a srst only, but we may have to assert trst as well */
                if (jtag_reset_config & RESET_SRST_PULLS_TRST)
@@ -304,11 +250,38 @@ int mips_m4k_assert_reset(struct target *target)
                        jtag_add_reset(0, 1);
                }
        }
+       else
+       {
+               if (mips_m4k->is_pic32mx)
+               {
+                       uint32_t mchip_cmd;
+
+                       LOG_DEBUG("Using MTAP reset to reset processor...");
+
+                       /* use microchip specific MTAP reset */
+                       mips_ejtag_set_instr(ejtag_info, MTAP_SW_MTAP);
+                       mips_ejtag_set_instr(ejtag_info, MTAP_COMMAND);
+
+                       mchip_cmd = MCHP_ASERT_RST;
+                       mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
+                       mchip_cmd = MCHP_DE_ASSERT_RST;
+                       mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
+                       mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
+               }
+               else
+               {
+                       /* use ejtag reset - not supported by all cores */
+                       uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST;
+                       LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor...");
+                       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
+                       mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+               }
+       }
 
        target->state = TARGET_RESET;
        jtag_add_sleep(50000);
 
-       register_cache_invalidate(mips32->core_cache);
+       register_cache_invalidate(mips_m4k->mips32.core_cache);
 
        if (target->reset_halt)
        {
@@ -320,7 +293,7 @@ int mips_m4k_assert_reset(struct target *target)
        return ERROR_OK;
 }
 
-int mips_m4k_deassert_reset(struct target *target)
+static int mips_m4k_deassert_reset(struct target *target)
 {
        LOG_DEBUG("target->state: %s",
                target_state_name(target));
@@ -331,15 +304,15 @@ int mips_m4k_deassert_reset(struct target *target)
        return ERROR_OK;
 }
 
-int mips_m4k_soft_reset_halt(struct target *target)
+static int mips_m4k_soft_reset_halt(struct target *target)
 {
        /* TODO */
        return ERROR_OK;
 }
 
-int mips_m4k_single_step_core(struct target *target)
+static int mips_m4k_single_step_core(struct target *target)
 {
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
        /* configure single step mode */
@@ -356,9 +329,10 @@ int mips_m4k_single_step_core(struct target *target)
        return ERROR_OK;
 }
 
-int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
+static int mips_m4k_resume(struct target *target, int current,
+               uint32_t address, int handle_breakpoints, int debug_execution)
 {
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
        struct breakpoint *breakpoint = NULL;
        uint32_t resume_pc;
@@ -384,6 +358,10 @@ int mips_m4k_resume(struct target *target, int current, uint32_t address, int ha
                mips32->core_cache->reg_list[MIPS32_PC].valid = 1;
        }
 
+       if (ejtag_info->impcode & EJTAG_IMP_MIPS16) {
+               buf_set_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 1, mips32->isa_mode);
+       }
+
        resume_pc = buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32);
 
        mips32_restore_context(target);
@@ -427,10 +405,11 @@ int mips_m4k_resume(struct target *target, int current, uint32_t address, int ha
        return ERROR_OK;
 }
 
-int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints)
+static int mips_m4k_step(struct target *target, int current,
+               uint32_t address, int handle_breakpoints)
 {
        /* get pointers to arch-specific information */
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
        struct breakpoint *breakpoint = NULL;
 
@@ -445,9 +424,12 @@ int mips_m4k_step(struct target *target, int current, uint32_t address, int hand
                buf_set_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32, address);
 
        /* the front-end may request us not to handle breakpoints */
-       if (handle_breakpoints)
-               if ((breakpoint = breakpoint_find(target, buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32))))
+       if (handle_breakpoints) {
+               breakpoint = breakpoint_find(target,
+                               buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32));
+               if (breakpoint)
                        mips_m4k_unset_breakpoint(target, breakpoint);
+       }
 
        /* restore context */
        mips32_restore_context(target);
@@ -479,7 +461,7 @@ int mips_m4k_step(struct target *target, int current, uint32_t address, int hand
        return ERROR_OK;
 }
 
-void mips_m4k_enable_breakpoints(struct target *target)
+static void mips_m4k_enable_breakpoints(struct target *target)
 {
        struct breakpoint *breakpoint = target->breakpoints;
 
@@ -492,9 +474,10 @@ void mips_m4k_enable_breakpoints(struct target *target)
        }
 }
 
-int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
+static int mips_m4k_set_breakpoint(struct target *target,
+               struct breakpoint *breakpoint)
 {
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
        struct mips32_comparator * comparator_list = mips32->inst_break_list;
        int retval;
 
@@ -514,7 +497,7 @@ int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint
                {
                        LOG_ERROR("Can not find free FP Comparator(bpid: %d)",
                                          breakpoint->unique_id );
-                       return ERROR_FAIL;
+                       return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
                breakpoint->set = bp_num + 1;
                comparator_list[bp_num].used = 1;
@@ -533,7 +516,8 @@ int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint
                {
                        uint32_t verify = 0xffffffff;
 
-                       if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK)
+                       if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1,
+                                       breakpoint->orig_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -556,7 +540,8 @@ int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint
                {
                        uint16_t verify = 0xffff;
 
-                       if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK)
+                       if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1,
+                                       breakpoint->orig_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -582,11 +567,12 @@ int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint
        return ERROR_OK;
 }
 
-int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoint)
+static int mips_m4k_unset_breakpoint(struct target *target,
+               struct breakpoint *breakpoint)
 {
        /* get pointers to arch-specific information */
-       struct mips32_common *mips32 = target->arch_info;
-       struct mips32_comparator * comparator_list = mips32->inst_break_list;
+       struct mips32_common *mips32 = target_to_mips32(target);
+       struct mips32_comparator *comparator_list = mips32->inst_break_list;
        int retval;
 
        if (!breakpoint->set)
@@ -621,13 +607,15 @@ int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoi
                        uint32_t current_instr;
 
                        /* check that user program has not modified breakpoint instruction */
-                       if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (uint8_t*)&current_instr)) != ERROR_OK)
+                       if ((retval = target_read_memory(target, breakpoint->address, 4, 1,
+                                       (uint8_t*)&current_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
                        if (current_instr == MIPS32_SDBBP)
                        {
-                               if ((retval = target_write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
+                               if ((retval = target_write_memory(target, breakpoint->address, 4, 1,
+                                               breakpoint->orig_instr)) != ERROR_OK)
                                {
                                        return retval;
                                }
@@ -638,14 +626,16 @@ int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoi
                        uint16_t current_instr;
 
                        /* check that user program has not modified breakpoint instruction */
-                       if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)&current_instr)) != ERROR_OK)
+                       if ((retval = target_read_memory(target, breakpoint->address, 2, 1,
+                                       (uint8_t*)&current_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
 
                        if (current_instr == MIPS16_SDBBP)
                        {
-                               if ((retval = target_write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
+                               if ((retval = target_write_memory(target, breakpoint->address, 2, 1,
+                                               breakpoint->orig_instr)) != ERROR_OK)
                                {
                                        return retval;
                                }
@@ -657,9 +647,9 @@ int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoi
        return ERROR_OK;
 }
 
-int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
+static int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
 
        if (breakpoint->type == BKPT_HARD)
        {
@@ -672,15 +662,14 @@ int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint
                mips32->num_inst_bpoints_avail--;
        }
 
-       mips_m4k_set_breakpoint(target, breakpoint);
-
-       return ERROR_OK;
+       return mips_m4k_set_breakpoint(target, breakpoint);
 }
 
-int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *breakpoint)
+static int mips_m4k_remove_breakpoint(struct target *target,
+               struct breakpoint *breakpoint)
 {
        /* get pointers to arch-specific information */
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
 
        if (target->state != TARGET_HALTED)
        {
@@ -699,10 +688,11 @@ int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *breakpo
        return ERROR_OK;
 }
 
-int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
+static int mips_m4k_set_watchpoint(struct target *target,
+               struct watchpoint *watchpoint)
 {
-       struct mips32_common *mips32 = target->arch_info;
-       struct mips32_comparator * comparator_list = mips32->data_break_list;
+       struct mips32_common *mips32 = target_to_mips32(target);
+       struct mips32_comparator *comparator_list = mips32->data_break_list;
        int wp_num = 0;
        /*
         * watchpoint enabled, ignore all byte lanes in value register
@@ -766,11 +756,12 @@ int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *watchpoint
        return ERROR_OK;
 }
 
-int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *watchpoint)
+static int mips_m4k_unset_watchpoint(struct target *target,
+               struct watchpoint *watchpoint)
 {
        /* get pointers to arch-specific information */
-       struct mips32_common *mips32 = target->arch_info;
-       struct mips32_comparator * comparator_list = mips32->data_break_list;
+       struct mips32_common *mips32 = target_to_mips32(target);
+       struct mips32_comparator *comparator_list = mips32->data_break_list;
 
        if (!watchpoint->set)
        {
@@ -792,9 +783,9 @@ int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *watchpoi
        return ERROR_OK;
 }
 
-int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
+static int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
 
        if (mips32->num_data_bpoints_avail < 1)
        {
@@ -808,10 +799,11 @@ int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint
        return ERROR_OK;
 }
 
-int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *watchpoint)
+static int mips_m4k_remove_watchpoint(struct target *target,
+               struct watchpoint *watchpoint)
 {
        /* get pointers to arch-specific information */
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
 
        if (target->state != TARGET_HALTED)
        {
@@ -829,7 +821,7 @@ int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *watchpo
        return ERROR_OK;
 }
 
-void mips_m4k_enable_watchpoints(struct target *target)
+static void mips_m4k_enable_watchpoints(struct target *target)
 {
        struct watchpoint *watchpoint = target->watchpoints;
 
@@ -842,9 +834,10 @@ void mips_m4k_enable_watchpoints(struct target *target)
        }
 }
 
-int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+static int mips_m4k_read_memory(struct target *target, uint32_t address,
+               uint32_t size, uint32_t count, uint8_t *buffer)
 {
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
        LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
@@ -874,12 +867,14 @@ int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size,
        return ERROR_OK;
 }
 
-int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+static int mips_m4k_write_memory(struct target *target, uint32_t address,
+               uint32_t size, uint32_t count, uint8_t *buffer)
 {
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
-       LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
+       LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
+                       address, size, count);
 
        if (target->state != TARGET_HALTED)
        {
@@ -901,16 +896,18 @@ int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size
                return mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
 }
 
-int mips_m4k_init_target(struct command_context *cmd_ctx, struct target *target)
+static int mips_m4k_init_target(struct command_context *cmd_ctx,
+               struct target *target)
 {
        mips32_build_reg_cache(target);
 
        return ERROR_OK;
 }
 
-int mips_m4k_init_arch_info(struct target *target, struct mips_m4k_common *mips_m4k, struct jtag_tap *tap)
+static int mips_m4k_init_arch_info(struct target *target,
+               struct mips_m4k_common *mips_m4k, struct jtag_tap *tap)
 {
-       struct mips32_common *mips32 = &mips_m4k->mips32_common;
+       struct mips32_common *mips32 = &mips_m4k->mips32;
 
        mips_m4k->common_magic = MIPSM4K_COMMON_MAGIC;
 
@@ -921,20 +918,20 @@ int mips_m4k_init_arch_info(struct target *target, struct mips_m4k_common *mips_
        return ERROR_OK;
 }
 
-int mips_m4k_target_create(struct target *target, Jim_Interp *interp)
+static int mips_m4k_target_create(struct target *target, Jim_Interp *interp)
 {
-       struct mips_m4k_common *mips_m4k = calloc(1,sizeof(struct mips_m4k_common));
+       struct mips_m4k_common *mips_m4k = calloc(1, sizeof(struct mips_m4k_common));
 
        mips_m4k_init_arch_info(target, mips_m4k, target->tap);
 
        return ERROR_OK;
 }
 
-int mips_m4k_examine(struct target *target)
+static int mips_m4k_examine(struct target *target)
 {
        int retval;
-       struct mips32_common *mips32 = target->arch_info;
-       struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
+       struct mips_m4k_common *mips_m4k = target_to_m4k(target);
+       struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info;
        uint32_t idcode = 0;
 
        if (!target_was_examined(target))
@@ -946,8 +943,9 @@ int mips_m4k_examine(struct target *target)
                {
                        /* we are using a pic32mx so select ejtag port
                         * as it is not selected by default */
-                       mips_ejtag_set_instr(ejtag_info, 0x05, NULL);
+                       mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
                        LOG_DEBUG("PIC32MX Detected - using EJTAG Interface");
+                       mips_m4k->is_pic32mx = true;
                }
        }
 
@@ -961,15 +959,16 @@ int mips_m4k_examine(struct target *target)
        return ERROR_OK;
 }
 
-int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
+static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
+               uint32_t count, uint8_t *buffer)
 {
-       struct mips32_common *mips32 = target->arch_info;
+       struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
        struct working_area *source;
        int retval;
-       int write = 1;
+       int write_t = 1;
 
-       LOG_DEBUG("address: 0x%8.8x, count: 0x%8.8x", address, count);
+       LOG_DEBUG("address: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, count);
 
        if (target->state != TARGET_HALTED)
        {
@@ -1000,7 +999,8 @@ int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t
                }
        }
 
-       retval = mips32_pracc_fastdata_xfer(ejtag_info, source, write, address, count, (uint32_t*) buffer);
+       retval = mips32_pracc_fastdata_xfer(ejtag_info, source, write_t, address,
+                       count, (uint32_t*) buffer);
        if (retval != ERROR_OK)
        {
                /* FASTDATA access failed, try normal memory write */
@@ -1014,7 +1014,39 @@ int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t
        return retval;
 }
 
-int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum)
+struct target_type mips_m4k_target =
 {
-       return ERROR_FAIL; /* use bulk read method */
-}
+       .name = "mips_m4k",
+
+       .poll = mips_m4k_poll,
+       .arch_state = mips32_arch_state,
+
+       .target_request_data = NULL,
+
+       .halt = mips_m4k_halt,
+       .resume = mips_m4k_resume,
+       .step = mips_m4k_step,
+
+       .assert_reset = mips_m4k_assert_reset,
+       .deassert_reset = mips_m4k_deassert_reset,
+       .soft_reset_halt = mips_m4k_soft_reset_halt,
+
+       .get_gdb_reg_list = mips32_get_gdb_reg_list,
+
+       .read_memory = mips_m4k_read_memory,
+       .write_memory = mips_m4k_write_memory,
+       .bulk_write_memory = mips_m4k_bulk_write_memory,
+       .checksum_memory = mips32_checksum_memory,
+       .blank_check_memory = mips32_blank_check_memory,
+
+       .run_algorithm = mips32_run_algorithm,
+
+       .add_breakpoint = mips_m4k_add_breakpoint,
+       .remove_breakpoint = mips_m4k_remove_breakpoint,
+       .add_watchpoint = mips_m4k_add_watchpoint,
+       .remove_watchpoint = mips_m4k_remove_watchpoint,
+
+       .target_create = mips_m4k_target_create,
+       .init_target = mips_m4k_init_target,
+       .examine = mips_m4k_examine,
+};

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