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Set empty usage field for commands that do not need parameters
[openocd.git] / src / target / mips_m4k.c
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index e2007d99efdc58d400698d8a780daef9cb4cbd2c..653d732f134dd99189c71facdd302b1bd9c029bb 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -33,6 +33,7 @@
 #include "mips32_dmaacc.h"
 #include "target_type.h"
 #include "register.h"
+#include "smp.h"
 
 static void mips_m4k_enable_breakpoints(struct target *target);
 static void mips_m4k_enable_watchpoints(struct target *target);
@@ -344,6 +345,8 @@ static int mips_m4k_assert_reset(struct target *target)
                        jtag_add_reset(1, 1);
                else if (!srst_asserted)
                        jtag_add_reset(0, 1);
+       } else if (target_has_event_action(target, TARGET_EVENT_RESET_ASSERT)) {
+               target_handle_event(target, TARGET_EVENT_RESET_ASSERT);
        } else {
                if (mips_m4k->is_pic32mx) {
                        LOG_DEBUG("Using MTAP reset to reset processor...");
@@ -456,8 +459,8 @@ static int mips_m4k_internal_restore(struct target *target, int current,
        if (!current) {
                mips_m4k_isa_filter(mips32->isa_imp, &address);
                buf_set_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32, address);
-               mips32->core_cache->reg_list[MIPS32_PC].dirty = 1;
-               mips32->core_cache->reg_list[MIPS32_PC].valid = 1;
+               mips32->core_cache->reg_list[MIPS32_PC].dirty = true;
+               mips32->core_cache->reg_list[MIPS32_PC].valid = true;
        }
 
        if ((mips32->isa_imp > 1) &&  debug_execution)  /* if more than one isa supported */
@@ -550,8 +553,8 @@ static int mips_m4k_step(struct target *target, int current,
        if (!current) {
                mips_m4k_isa_filter(mips32->isa_imp, &address);
                buf_set_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32, address);
-               mips32->core_cache->reg_list[MIPS32_PC].dirty = 1;
-               mips32->core_cache->reg_list[MIPS32_PC].valid = 1;
+               mips32->core_cache->reg_list[MIPS32_PC].dirty = true;
+               mips32->core_cache->reg_list[MIPS32_PC].valid = true;
        }
 
        /* the front-end may request us not to handle breakpoints */
@@ -702,7 +705,7 @@ static int mips_m4k_set_breakpoint(struct target *target,
                        }
 
                        if (verify == 0) {
-                               LOG_ERROR("Unable to set 32bit breakpoint at address %08" PRIx64
+                               LOG_ERROR("Unable to set 32bit breakpoint at address %08" TARGET_PRIxADDR
                                        " - check that memory is read/writable", breakpoint->address);
                                return ERROR_OK;
                        }
@@ -723,7 +726,7 @@ static int mips_m4k_set_breakpoint(struct target *target,
                                return retval;
 
                        if (verify != MIPS16_SDBBP(isa_req)) {
-                               LOG_ERROR("Unable to set 16bit breakpoint at address %08" PRIx64
+                               LOG_ERROR("Unable to set 16bit breakpoint at address %08" TARGET_PRIxADDR
                                                " - check that memory is read/writable", breakpoint->address);
                                return ERROR_OK;
                        }
@@ -1174,36 +1177,30 @@ static int mips_m4k_target_create(struct target *target, Jim_Interp *interp)
 
 static int mips_m4k_examine(struct target *target)
 {
-       int retval;
        struct mips_m4k_common *mips_m4k = target_to_m4k(target);
        struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info;
-       uint32_t idcode = 0;
 
        if (!target_was_examined(target)) {
-               retval = mips_ejtag_get_idcode(ejtag_info, &idcode);
-               if (retval != ERROR_OK)
+               int retval = mips_ejtag_get_idcode(ejtag_info);
+               if (retval != ERROR_OK) {
+                       LOG_ERROR("idcode read failed");
                        return retval;
-               ejtag_info->idcode = idcode;
-
-               if (((idcode >> 1) & 0x7FF) == 0x29) {
+               }
+               if (((ejtag_info->idcode >> 1) & 0x7FF) == 0x29) {
                        /* we are using a pic32mx so select ejtag port
                         * as it is not selected by default */
                        mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
-                       LOG_DEBUG("PIC32MX Detected - using EJTAG Interface");
+                       LOG_DEBUG("PIC32 Detected - using EJTAG Interface");
                        mips_m4k->is_pic32mx = true;
                }
        }
 
        /* init rest of ejtag interface */
-       retval = mips_ejtag_init(ejtag_info);
-       if (retval != ERROR_OK)
-               return retval;
-
-       retval = mips32_examine(target);
+       int retval = mips_ejtag_init(ejtag_info);
        if (retval != ERROR_OK)
                return retval;
 
-       return ERROR_OK;
+       return mips32_examine(target);
 }
 
 static int mips_m4k_bulk_write_memory(struct target *target, target_addr_t address,
@@ -1337,64 +1334,6 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command)
        return ERROR_OK;
 }
 
-COMMAND_HANDLER(mips_m4k_handle_smp_off_command)
-{
-       struct target *target = get_current_target(CMD_CTX);
-       /* check target is an smp target */
-       struct target_list *head;
-       struct target *curr;
-       head = target->head;
-       target->smp = 0;
-       if (head != (struct target_list *)NULL) {
-               while (head != (struct target_list *)NULL) {
-                       curr = head->target;
-                       curr->smp = 0;
-                       head = head->next;
-               }
-               /*  fixes the target display to the debugger */
-               target->gdb_service->target = target;
-       }
-       return ERROR_OK;
-}
-
-COMMAND_HANDLER(mips_m4k_handle_smp_on_command)
-{
-       struct target *target = get_current_target(CMD_CTX);
-       struct target_list *head;
-       struct target *curr;
-       head = target->head;
-       if (head != (struct target_list *)NULL) {
-               target->smp = 1;
-               while (head != (struct target_list *)NULL) {
-                       curr = head->target;
-                       curr->smp = 1;
-                       head = head->next;
-               }
-       }
-       return ERROR_OK;
-}
-
-COMMAND_HANDLER(mips_m4k_handle_smp_gdb_command)
-{
-       struct target *target = get_current_target(CMD_CTX);
-       int retval = ERROR_OK;
-       struct target_list *head;
-       head = target->head;
-       if (head != (struct target_list *)NULL) {
-               if (CMD_ARGC == 1) {
-                       int coreid = 0;
-                       COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], coreid);
-                       if (ERROR_OK != retval)
-                               return retval;
-                       target->gdb_service->core[1] = coreid;
-
-               }
-               command_print(CMD_CTX, "gdb coreid  %" PRId32 " -> %" PRId32, target->gdb_service->core[0]
-                       , target->gdb_service->core[1]);
-       }
-       return ERROR_OK;
-}
-
 COMMAND_HANDLER(mips_m4k_handle_scan_delay_command)
 {
        struct target *target = get_current_target(CMD_CTX);
@@ -1426,27 +1365,6 @@ static const struct command_registration mips_m4k_exec_command_handlers[] = {
                .usage = "regnum [value]",
                .help = "display/modify cp0 register",
        },
-       {
-               .name = "smp_off",
-               .handler = mips_m4k_handle_smp_off_command,
-               .mode = COMMAND_EXEC,
-               .help = "Stop smp handling",
-               .usage = "",},
-
-       {
-               .name = "smp_on",
-               .handler = mips_m4k_handle_smp_on_command,
-               .mode = COMMAND_EXEC,
-               .help = "Restart smp handling",
-               .usage = "",
-       },
-       {
-               .name = "smp_gdb",
-               .handler = mips_m4k_handle_smp_gdb_command,
-               .mode = COMMAND_EXEC,
-               .help = "display/fix current core played to gdb",
-               .usage = "",
-       },
        {
                .name = "scan_delay",
                .handler = mips_m4k_handle_scan_delay_command,
@@ -1454,6 +1372,9 @@ static const struct command_registration mips_m4k_exec_command_handlers[] = {
                .help = "display/set scan delay in nano seconds",
                .usage = "[value]",
        },
+       {
+               .chain = smp_command_handlers,
+       },
        COMMAND_REGISTRATION_DONE
 };
 
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