jtag: linuxgpiod: drop extra parenthesis

[openocd.git] / src / target / mips_m4k.c

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 14e3f3b27ae655aec04dfba2d89b7f701dc464b7..ad98089614cd6e4577fefe5d5b057ad3996baa83 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -100,17 +100,19 @@ static int mips_m4k_debug_entry(struct target *target)
        /* attempt to find halt reason */
        mips_m4k_examine_debug_reason(target);
 
+       mips32_cpu_probe(target);
+
        mips32_read_config_regs(target);
 
        /* default to mips32 isa, it will be changed below if required */
        mips32->isa_mode = MIPS32_ISA_MIPS32;
 
        /* other than mips32 only and isa bit set ? */
-       if (mips32->isa_imp && buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 1))
+       if (mips32->isa_imp && buf_get_u32(mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].value, 0, 1))
                mips32->isa_mode = mips32->isa_imp == 2 ? MIPS32_ISA_MIPS16E : MIPS32_ISA_MMIPS32;
 
        LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s",
-                       buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32),
+                       buf_get_u32(mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].value, 0, 32),
                        target_state_name(target));
 
        return ERROR_OK;
@@ -140,7 +142,7 @@ static int mips_m4k_halt_smp(struct target *target)
                        ret = mips_m4k_halt(curr);
 
                if (ret != ERROR_OK) {
-                       LOG_ERROR("halt failed target->coreid: %" PRId32, curr->coreid);
+                       LOG_TARGET_ERROR(curr, "halt failed.");
                        retval = ret;
                }
        }
@@ -410,8 +412,8 @@ static int mips_m4k_restore_smp(struct target *target, uint32_t address, int han
                                                   handle_breakpoints, 0);
 
                        if (ret != ERROR_OK) {
-                               LOG_ERROR("target->coreid :%" PRId32 " failed to resume at address :0x%" PRIx32,
-                                                 curr->coreid, address);
+                               LOG_TARGET_ERROR(curr, "failed to resume at address: 0x%" PRIx32,
+                                               address);
                                retval = ret;
                        }
                }
@@ -441,18 +443,18 @@ static int mips_m4k_internal_restore(struct target *target, int current,
        /* current = 1: continue on current pc, otherwise continue at <address> */
        if (!current) {
                mips_m4k_isa_filter(mips32->isa_imp, &address);
-               buf_set_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32, address);
-               mips32->core_cache->reg_list[MIPS32_PC].dirty = true;
-               mips32->core_cache->reg_list[MIPS32_PC].valid = true;
+               buf_set_u32(mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].value, 0, 32, address);
+               mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].dirty = true;
+               mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].valid = true;
        }
 
        if ((mips32->isa_imp > 1) &&  debug_execution)  /* if more than one isa supported */
-               buf_set_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 1, mips32->isa_mode);
+               buf_set_u32(mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].value, 0, 1, mips32->isa_mode);
 
        if (!current)
                resume_pc = address;
        else
-               resume_pc = buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32);
+               resume_pc = buf_get_u32(mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].value, 0, 32);
 
        mips32_restore_context(target);
 
@@ -535,15 +537,15 @@ static int mips_m4k_step(struct target *target, int current,
        /* current = 1: continue on current pc, otherwise continue at <address> */
        if (!current) {
                mips_m4k_isa_filter(mips32->isa_imp, &address);
-               buf_set_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32, address);
-               mips32->core_cache->reg_list[MIPS32_PC].dirty = true;
-               mips32->core_cache->reg_list[MIPS32_PC].valid = true;
+               buf_set_u32(mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].value, 0, 32, address);
+               mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].dirty = true;
+               mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].valid = true;
        }
 
        /* the front-end may request us not to handle breakpoints */
        if (handle_breakpoints) {
                breakpoint = breakpoint_find(target,
-                               buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32));
+                               buf_get_u32(mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].value, 0, 32));
                if (breakpoint)
                        mips_m4k_unset_breakpoint(target, breakpoint);
        }