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flash/stm32l4x: add support of STM32WB1x
[openocd.git] / src / target / mips_m4k.c
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 653d732f134dd99189c71facdd302b1bd9c029bb..cd06893511cfe3e6fb26e498d7705704b2951a92 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -186,7 +186,7 @@ static int mips_m4k_poll(struct target *target)
        /*  the next polling trigger an halt event sent to gdb */
        if ((target->state == TARGET_HALTED) && (target->smp) &&
                (target->gdb_service) &&
-               (target->gdb_service->target == NULL)) {
+               (!target->gdb_service->target)) {
                target->gdb_service->target =
                        get_mips_m4k(target, target->gdb_service->core[1]);
                target_call_event_callbacks(target, TARGET_EVENT_HALTED);
@@ -667,7 +667,7 @@ static int mips_m4k_set_breakpoint(struct target *target,
                        if (ejtag_info->endianness && isa_req)
                                sdbbp32_instr = SWAP16(sdbbp32_instr);
 
-                       if ((breakpoint->address & 3) == 0) {   /* word alligned */
+                       if ((breakpoint->address & 3) == 0) {   /* word aligned */
 
                                retval = target_read_memory(target, bpaddr, bplength, 1, breakpoint->orig_instr);
                                if (retval != ERROR_OK)
@@ -784,9 +784,9 @@ static int mips_m4k_unset_breakpoint(struct target *target,
                                if (retval != ERROR_OK)
                                        return retval;
                                /**
-                               * target_read_memory() gets us data in _target_ endianess.
+                               * target_read_memory() gets us data in _target_ endianness.
                                * If we want to use this data on the host for comparisons with some macros
-                               * we must first transform it to _host_ endianess using target_buffer_get_u16().
+                               * we must first transform it to _host_ endianness using target_buffer_get_u16().
                                */
                                if (sdbbp32_instr == target_buffer_get_u32(target, current_instr)) {
                                        retval = target_write_memory(target, breakpoint->address, 4, 1,
@@ -794,7 +794,7 @@ static int mips_m4k_unset_breakpoint(struct target *target,
                                        if (retval != ERROR_OK)
                                                return retval;
                                }
-                       } else {        /* 16bit alligned */
+                       } else {        /* 16bit aligned */
                                retval = target_read_memory(target, breakpoint->address, 2, 2, current_instr);
                                if (retval != ERROR_OK)
                                        return retval;
@@ -880,8 +880,8 @@ static int mips_m4k_set_watchpoint(struct target *target,
         * and exclude both load and store accesses from  watchpoint
         * condition evaluation
        */
-       int enable = EJTAG_DBCn_NOSB | EJTAG_DBCn_NOLB | EJTAG_DBCn_BE |
-                       (0xff << EJTAG_DBCn_BLM_SHIFT);
+       int enable = EJTAG_DBCN_NOSB | EJTAG_DBCN_NOLB | EJTAG_DBCN_BE |
+                       (0xff << EJTAG_DBCN_BLM_SHIFT);
 
        if (watchpoint->set) {
                LOG_WARNING("watchpoint already set");
@@ -907,13 +907,13 @@ static int mips_m4k_set_watchpoint(struct target *target,
 
        switch (watchpoint->rw) {
                case WPT_READ:
-                       enable &= ~EJTAG_DBCn_NOLB;
+                       enable &= ~EJTAG_DBCN_NOLB;
                        break;
                case WPT_WRITE:
-                       enable &= ~EJTAG_DBCn_NOSB;
+                       enable &= ~EJTAG_DBCN_NOSB;
                        break;
                case WPT_ACCESS:
-                       enable &= ~(EJTAG_DBCn_NOLB | EJTAG_DBCn_NOSB);
+                       enable &= ~(EJTAG_DBCN_NOLB | EJTAG_DBCN_NOSB);
                        break;
                default:
                        LOG_ERROR("BUG: watchpoint->rw neither read, write nor access");
@@ -1045,7 +1045,7 @@ static int mips_m4k_read_memory(struct target *target, target_addr_t address,
 
        if (size > 1) {
                t = malloc(count * size * sizeof(uint8_t));
-               if (t == NULL) {
+               if (!t) {
                        LOG_ERROR("Out of memory");
                        return ERROR_FAIL;
                }
@@ -1061,7 +1061,7 @@ static int mips_m4k_read_memory(struct target *target, target_addr_t address,
 
        /* mips32_..._read_mem with size 4/2 returns uint32_t/uint16_t in host */
        /* endianness, but byte array should represent target endianness       */
-       if (ERROR_OK == retval) {
+       if (retval == ERROR_OK) {
                switch (size) {
                case 4:
                        target_buffer_set_u32_array(target, buffer, count, t);
@@ -1072,7 +1072,7 @@ static int mips_m4k_read_memory(struct target *target, target_addr_t address,
                }
        }
 
-       if ((size > 1) && (t != NULL))
+       if (size > 1)
                free(t);
 
        return retval;
@@ -1106,13 +1106,13 @@ static int mips_m4k_write_memory(struct target *target, target_addr_t address,
        if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
                return ERROR_TARGET_UNALIGNED_ACCESS;
 
-       /** correct endianess if we have word or hword access */
+       /** correct endianness if we have word or hword access */
        void *t = NULL;
        if (size > 1) {
                /* mips32_..._write_mem with size 4/2 requires uint32_t/uint16_t in host */
                /* endianness, but byte array represents target endianness               */
                t = malloc(count * size * sizeof(uint8_t));
-               if (t == NULL) {
+               if (!t) {
                        LOG_ERROR("Out of memory");
                        return ERROR_FAIL;
                }
@@ -1135,10 +1135,9 @@ static int mips_m4k_write_memory(struct target *target, target_addr_t address,
        else
                retval = mips32_dmaacc_write_mem(ejtag_info, address, size, count, buffer);
 
-       if (t != NULL)
-               free(t);
+       free(t);
 
-       if (ERROR_OK != retval)
+       if (retval != ERROR_OK)
                return retval;
 
        return ERROR_OK;
@@ -1219,7 +1218,7 @@ static int mips_m4k_bulk_write_memory(struct target *target, target_addr_t addre
        if (address & 0x3u)
                return ERROR_TARGET_UNALIGNED_ACCESS;
 
-       if (mips32->fast_data_area == NULL) {
+       if (!mips32->fast_data_area) {
                /* Get memory for block write handler
                 * we preserve this area between calls and gain a speed increase
                 * of about 3kb/sec when writing flash
@@ -1251,7 +1250,7 @@ static int mips_m4k_bulk_write_memory(struct target *target, target_addr_t addre
        /* but byte array represents target endianness                      */
        uint32_t *t = NULL;
        t = malloc(count * sizeof(uint32_t));
-       if (t == NULL) {
+       if (!t) {
                LOG_ERROR("Out of memory");
                return ERROR_FAIL;
        }
@@ -1261,8 +1260,7 @@ static int mips_m4k_bulk_write_memory(struct target *target, target_addr_t addre
        retval = mips32_pracc_fastdata_xfer(ejtag_info, mips32->fast_data_area, write_t, address,
                        count, t);
 
-       if (t != NULL)
-               free(t);
+       free(t);
 
        if (retval != ERROR_OK)
                LOG_ERROR("Fastdata access Failed");
@@ -1270,11 +1268,11 @@ static int mips_m4k_bulk_write_memory(struct target *target, target_addr_t addre
        return retval;
 }
 
-static int mips_m4k_verify_pointer(struct command_context *cmd_ctx,
+static int mips_m4k_verify_pointer(struct command_invocation *cmd,
                struct mips_m4k_common *mips_m4k)
 {
        if (mips_m4k->common_magic != MIPSM4K_COMMON_MAGIC) {
-               command_print(cmd_ctx, "target is not an MIPS_M4K");
+               command_print(cmd, "target is not an MIPS_M4K");
                return ERROR_TARGET_INVALID;
        }
        return ERROR_OK;
@@ -1287,12 +1285,12 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command)
        struct mips_m4k_common *mips_m4k = target_to_m4k(target);
        struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info;
 
-       retval = mips_m4k_verify_pointer(CMD_CTX, mips_m4k);
+       retval = mips_m4k_verify_pointer(CMD, mips_m4k);
        if (retval != ERROR_OK)
                return retval;
 
        if (target->state != TARGET_HALTED) {
-               command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
+               command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
                return ERROR_OK;
        }
 
@@ -1308,12 +1306,12 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command)
                        uint32_t value;
                        retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
                        if (retval != ERROR_OK) {
-                               command_print(CMD_CTX,
-                                               "couldn't access reg %" PRIi32,
+                               command_print(CMD,
+                                               "couldn't access reg %" PRIu32,
                                                cp0_reg);
                                return ERROR_OK;
                        }
-                       command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+                       command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32,
                                        cp0_reg, cp0_sel, value);
 
                } else if (CMD_ARGC == 3) {
@@ -1321,12 +1319,12 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command)
                        COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], value);
                        retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel);
                        if (retval != ERROR_OK) {
-                               command_print(CMD_CTX,
-                                               "couldn't access cp0 reg %" PRIi32 ", select %" PRIi32,
+                               command_print(CMD,
+                                               "couldn't access cp0 reg %" PRIu32 ", select %" PRIu32,
                                                cp0_reg,  cp0_sel);
                                return ERROR_OK;
                        }
-                       command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+                       command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32,
                                        cp0_reg, cp0_sel, value);
                }
        }
@@ -1345,13 +1343,13 @@ COMMAND_HANDLER(mips_m4k_handle_scan_delay_command)
        else if (CMD_ARGC > 1)
                        return ERROR_COMMAND_SYNTAX_ERROR;
 
-       command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay);
+       command_print(CMD, "scan delay: %d nsec", ejtag_info->scan_delay);
        if (ejtag_info->scan_delay >= MIPS32_SCAN_DELAY_LEGACY_MODE) {
                ejtag_info->mode = 0;
-               command_print(CMD_CTX, "running in legacy mode");
+               command_print(CMD, "running in legacy mode");
        } else {
                ejtag_info->mode = 1;
-               command_print(CMD_CTX, "running in fast queued mode");
+               command_print(CMD, "running in fast queued mode");
        }
 
        return ERROR_OK;
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