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- Replace 'for(' with 'for ('.
[openocd.git] / src / target / mips_m4k.c
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index a16590c812704978880fc97db0425ceb5fa6c5ad..e4259ae631475ebe9a741cbebca2d0ac4b5c8d0a 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -26,6 +26,7 @@
 #include "mips32.h"
 #include "mips_m4k.h"
 #include "mips32_dmaacc.h"
+#include "target_type.h"
 
 
 /* cli handling */
@@ -34,10 +35,10 @@
 int mips_m4k_poll(target_t *target);
 int mips_m4k_halt(struct target_s *target);
 int mips_m4k_soft_reset_halt(struct target_s *target);
-int mips_m4k_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
-int mips_m4k_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
-int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
+int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
+int mips_m4k_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints);
+int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 int mips_m4k_register_commands(struct command_context_s *cmd_ctx);
 int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
 int mips_m4k_quit(void);
@@ -46,7 +47,7 @@ int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp);
 int mips_m4k_examine(struct target_s *target);
 int mips_m4k_assert_reset(target_t *target);
 int mips_m4k_deassert_reset(target_t *target);
-int mips_m4k_checksum_memory(target_t *target, u32 address, u32 size, u32 *checksum);
+int mips_m4k_checksum_memory(target_t *target, uint32_t address, uint32_t size, uint32_t *checksum);
 
 target_type_t mips_m4k_target =
 {
@@ -89,7 +90,7 @@ target_type_t mips_m4k_target =
 
 int mips_m4k_examine_debug_reason(target_t *target)
 {
-       u32 break_status;
+       uint32_t break_status;
        int retval;
 
        if ((target->debug_reason != DBG_REASON_DBGRQ)
@@ -125,7 +126,7 @@ int mips_m4k_debug_entry(target_t *target)
 {
        mips32_common_t *mips32 = target->arch_info;
        mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
-       u32 debug_reg;
+       uint32_t debug_reg;
 
        /* read debug register */
        mips_ejtag_read_debug(ejtag_info, &debug_reg);
@@ -145,8 +146,8 @@ int mips_m4k_debug_entry(target_t *target)
 
        mips32_save_context(target);
 
-       LOG_DEBUG("entered debug state at PC 0x%x, target->state: %s",
-               *(u32*)(mips32->core_cache->reg_list[MIPS32_PC].value),
+       LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s",
+               *(uint32_t*)(mips32->core_cache->reg_list[MIPS32_PC].value),
                  Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name);
 
        return ERROR_OK;
@@ -157,10 +158,10 @@ int mips_m4k_poll(target_t *target)
        int retval;
        mips32_common_t *mips32 = target->arch_info;
        mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
-       u32 ejtag_ctrl = ejtag_info->ejtag_ctrl;
+       uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl;
 
        /* read ejtag control reg */
-       jtag_add_end_state(TAP_IDLE);
+       jtag_set_end_state(TAP_IDLE);
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -170,7 +171,7 @@ int mips_m4k_poll(target_t *target)
        {
                /* we have detected a reset, clear flag
                 * otherwise ejtag will not work */
-               jtag_add_end_state(TAP_IDLE);
+               jtag_set_end_state(TAP_IDLE);
                ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_ROCC;
 
                mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
@@ -183,7 +184,7 @@ int mips_m4k_poll(target_t *target)
        {
                if ((target->state == TARGET_RUNNING) || (target->state == TARGET_RESET))
                {
-                       jtag_add_end_state(TAP_IDLE);
+                       jtag_set_end_state(TAP_IDLE);
                        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
 
                        target->state = TARGET_HALTED;
@@ -234,7 +235,7 @@ int mips_m4k_halt(struct target_s *target)
 
        if (target->state == TARGET_RESET)
        {
-               if ((jtag_reset_config & RESET_SRST_PULLS_TRST) && jtag_srst)
+               if ((jtag_get_reset_config() & RESET_SRST_PULLS_TRST) && jtag_get_srst())
                {
                        LOG_ERROR("can't request a halt while in reset if nSRST pulls nTRST");
                        return ERROR_TARGET_FAILURE;
@@ -266,6 +267,7 @@ int mips_m4k_assert_reset(target_t *target)
        LOG_DEBUG("target->state: %s",
                Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name);
 
+       enum reset_types jtag_reset_config = jtag_get_reset_config();
        if (!(jtag_reset_config & RESET_HAS_SRST))
        {
                LOG_ERROR("Can't assert SRST");
@@ -275,18 +277,18 @@ int mips_m4k_assert_reset(target_t *target)
        if (target->reset_halt)
        {
                /* use hardware to catch reset */
-               jtag_add_end_state(TAP_IDLE);
+               jtag_set_end_state(TAP_IDLE);
                mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT, NULL);
        }
        else
        {
-               jtag_add_end_state(TAP_IDLE);
+               jtag_set_end_state(TAP_IDLE);
                mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
        }
 
        if (strcmp(target->variant, "ejtag_srst") == 0)
        {
-               u32 ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST;
+               uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST;
                LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor...");
                mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
                mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
@@ -355,12 +357,12 @@ int mips_m4k_single_step_core(target_t *target)
        return ERROR_OK;
 }
 
-int mips_m4k_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution)
+int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
 {
        mips32_common_t *mips32 = target->arch_info;
        mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
        breakpoint_t *breakpoint = NULL;
-       u32 resume_pc;
+       uint32_t resume_pc;
 
        if (target->state != TARGET_HALTED)
        {
@@ -393,7 +395,7 @@ int mips_m4k_resume(struct target_s *target, int current, u32 address, int handl
                /* Single step past breakpoint at current address */
                if ((breakpoint = breakpoint_find(target, resume_pc)))
                {
-                       LOG_DEBUG("unset breakpoint at 0x%8.8x", breakpoint->address);
+                       LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
                        mips_m4k_unset_breakpoint(target, breakpoint);
                        mips_m4k_single_step_core(target);
                        mips_m4k_set_breakpoint(target, breakpoint);
@@ -414,19 +416,19 @@ int mips_m4k_resume(struct target_s *target, int current, u32 address, int handl
        {
                target->state = TARGET_RUNNING;
                target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
-               LOG_DEBUG("target resumed at 0x%x", resume_pc);
+               LOG_DEBUG("target resumed at 0x%" PRIx32 "", resume_pc);
        }
        else
        {
                target->state = TARGET_DEBUG_RUNNING;
                target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
-               LOG_DEBUG("target debug resumed at 0x%x", resume_pc);
+               LOG_DEBUG("target debug resumed at 0x%" PRIx32 "", resume_pc);
        }
 
        return ERROR_OK;
 }
 
-int mips_m4k_step(struct target_s *target, int current, u32 address, int handle_breakpoints)
+int mips_m4k_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
 {
        /* get pointers to arch-specific information */
        mips32_common_t *mips32 = target->arch_info;
@@ -507,7 +509,7 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
        {
                int bp_num = 0;
 
-               while(comparator_list[bp_num].used && (bp_num < mips32->num_inst_bpoints))
+               while (comparator_list[bp_num].used && (bp_num < mips32->num_inst_bpoints))
                        bp_num++;
                if (bp_num >= mips32->num_inst_bpoints)
                {
@@ -521,15 +523,15 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                target_write_u32(target, comparator_list[bp_num].reg_address, comparator_list[bp_num].bp_value);
                target_write_u32(target, comparator_list[bp_num].reg_address + 0x08, 0x00000000);
                target_write_u32(target, comparator_list[bp_num].reg_address + 0x18, 1);
-               LOG_DEBUG("bp_num %i bp_value 0x%x", bp_num, comparator_list[bp_num].bp_value);
+               LOG_DEBUG("bp_num %i bp_value 0x%" PRIx32 "", bp_num, comparator_list[bp_num].bp_value);
        }
        else if (breakpoint->type == BKPT_SOFT)
        {
                if (breakpoint->length == 4)
                {
-                       u32 verify = 0xffffffff;
+                       uint32_t verify = 0xffffffff;
                        
-                       if((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK)
+                       if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -544,15 +546,15 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                        }
                        if (verify != MIPS32_SDBBP)
                        {
-                               LOG_ERROR("Unable to set 32bit breakpoint at address %08x - check that memory is read/writable", breakpoint->address);
+                               LOG_ERROR("Unable to set 32bit breakpoint at address %08" PRIx32 " - check that memory is read/writable", breakpoint->address);
                                return ERROR_OK;
                        }
                }
                else
                {
-                       u16 verify = 0xffff;
+                       uint16_t verify = 0xffff;
                        
-                       if((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK)
+                       if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -567,7 +569,7 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                        }
                        if (verify != MIPS16_SDBBP)
                        {
-                               LOG_ERROR("Unable to set 16bit breakpoint at address %08x - check that memory is read/writable", breakpoint->address);
+                               LOG_ERROR("Unable to set 16bit breakpoint at address %08" PRIx32 " - check that memory is read/writable", breakpoint->address);
                                return ERROR_OK;
                        }
                }
@@ -608,16 +610,16 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                /* restore original instruction (kept in target endianness) */
                if (breakpoint->length == 4)
                {
-                       u32 current_instr;
+                       uint32_t current_instr;
                        
                        /* check that user program has not modified breakpoint instruction */
-                       if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (u8*)&current_instr)) != ERROR_OK)
+                       if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (uint8_t*)&current_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
                        if (current_instr == MIPS32_SDBBP)
                        {
-                               if((retval = target->type->write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
+                               if ((retval = target_write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
                                {
                                        return retval;
                                }
@@ -625,17 +627,17 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                }
                else
                {
-                       u16 current_instr;
+                       uint16_t current_instr;
                        
                        /* check that user program has not modified breakpoint instruction */
-                       if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (u8*)&current_instr)) != ERROR_OK)
+                       if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)&current_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
                        
                        if (current_instr == MIPS16_SDBBP)
                        {
-                               if((retval = target->type->write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
+                               if ((retval = target_write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
                                {
                                        return retval;
                                }
@@ -726,12 +728,12 @@ void mips_m4k_enable_watchpoints(struct target_s *target)
        }
 }
 
-int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
        mips32_common_t *mips32 = target->arch_info;
        mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 
-       LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
+       LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
 
        if (target->state != TARGET_HALTED)
        {
@@ -746,31 +748,46 @@ int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 cou
        if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
                return ERROR_TARGET_UNALIGNED_ACCESS;
 
-       switch (size)
-       {
-               case 4:
-               case 2:
-               case 1:
-                       /* if noDMA off, use DMAACC mode for memory read */
-                       if(ejtag_info->impcode & EJTAG_IMP_NODMA)
-                               return mips32_pracc_read_mem(ejtag_info, address, size, count, (void *)buffer);
-                       else
-                               return mips32_dmaacc_read_mem(ejtag_info, address, size, count, (void *)buffer);
-               default:
-                       LOG_ERROR("BUG: we shouldn't get here");
-                       exit(-1);
-                       break;
+       /* if noDMA off, use DMAACC mode for memory read */
+       int retval;
+       if (ejtag_info->impcode & EJTAG_IMP_NODMA)
+               retval = mips32_pracc_read_mem(ejtag_info, address, size, count, (void *)buffer);
+       else
+               retval = mips32_dmaacc_read_mem(ejtag_info, address, size, count, (void *)buffer);
+       if (ERROR_OK != retval)
+               return retval;
+
+       /* TAP data register is loaded LSB first (little endian) */
+       if (target->endianness == TARGET_BIG_ENDIAN) 
+       {
+               uint32_t i, t32;
+               uint16_t t16;
+
+               for (i = 0; i < (count*size); i += size)
+               {
+                       switch (size)
+                       {
+                               case 4:
+                                       t32 = le_to_h_u32(&buffer[i]);
+                                       h_u32_to_be(&buffer[i], t32);
+                                       break;
+                               case 2:
+                                       t16 = le_to_h_u16(&buffer[i]);
+                                       h_u16_to_be(&buffer[i], t16);
+                                       break;
+                       }
+               }
        }
 
        return ERROR_OK;
 }
 
-int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
        mips32_common_t *mips32 = target->arch_info;
        mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
 
-       LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
+       LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
 
        if (target->state != TARGET_HALTED)
        {
@@ -785,24 +802,33 @@ int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 co
        if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
                return ERROR_TARGET_UNALIGNED_ACCESS;
 
-       switch (size)
-       {
-               case 4:
-               case 2:
-               case 1:
-                       /* if noDMA off, use DMAACC mode for memory write */
-                       if(ejtag_info->impcode & EJTAG_IMP_NODMA)
-                               mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
-                       else
-                               mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
-                       break;
-               default:
-                       LOG_ERROR("BUG: we shouldn't get here");
-                       exit(-1);
-                       break;
-       }
+       /* TAP data register is loaded LSB first (little endian) */
+       if (target->endianness == TARGET_BIG_ENDIAN)
+       {
+               uint32_t i, t32;
+               uint16_t t16;
 
-       return ERROR_OK;
+               for (i = 0; i < (count*size); i += size)
+               {
+                       switch (size) 
+                       {
+                               case 4:
+                                       t32 = be_to_h_u32(&buffer[i]);
+                                       h_u32_to_le(&buffer[i], t32);
+                                       break;
+                               case 2:
+                                       t16 = be_to_h_u16(&buffer[i]);
+                                       h_u16_to_le(&buffer[i], t16);
+                                       break;
+                       }
+               }
+       }          
+
+       /* if noDMA off, use DMAACC mode for memory write */
+       if (ejtag_info->impcode & EJTAG_IMP_NODMA)
+               return mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
+       else
+               return mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
 }
 
 int mips_m4k_register_commands(struct command_context_s *cmd_ctx)
@@ -852,11 +878,11 @@ int mips_m4k_examine(struct target_s *target)
        int retval;
        mips32_common_t *mips32 = target->arch_info;
        mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
-       u32 idcode = 0;
+       uint32_t idcode = 0;
 
-       if (!target->type->examined)
+       if (!target_was_examined(target))
        {
-               mips_ejtag_get_idcode(ejtag_info, &idcode, NULL);
+               mips_ejtag_get_idcode(ejtag_info, &idcode);
                ejtag_info->idcode = idcode;
                
                if (((idcode >> 1) & 0x7FF) == 0x29)
@@ -878,12 +904,12 @@ int mips_m4k_examine(struct target_s *target)
        return ERROR_OK;
 }
 
-int mips_m4k_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer)
+int mips_m4k_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer)
 {
        return mips_m4k_write_memory(target, address, 4, count, buffer);
 }
 
-int mips_m4k_checksum_memory(target_t *target, u32 address, u32 size, u32 *checksum)
+int mips_m4k_checksum_memory(target_t *target, uint32_t address, uint32_t size, uint32_t *checksum)
 {
        return ERROR_FAIL; /* use bulk read method */
 }
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