Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
target algo: do not write reg_param if direction is PARAM_IN
[openocd.git] / src / target / nds32.c
diff --git a/src/target/nds32.c b/src/target/nds32.c
index 8ab285999e2072e0f30736905b371b88abcde926..4115ea4f24f7553041859e7c56a63403efa8934f 100644 (file)
--- a/src/target/nds32.c
+++ b/src/target/nds32.c
@@ -13,9 +13,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -86,32 +84,32 @@ static int nds32_get_core_reg(struct reg *reg)
        }
 
        if (reg->valid) {
+               uint32_t val = buf_get_u32(reg_arch_info->value, 0, 32);
                LOG_DEBUG("reading register(cached) %" PRIi32 "(%s), value: 0x%8.8" PRIx32,
-                               reg_arch_info->num, reg->name, reg_arch_info->value);
+                               reg_arch_info->num, reg->name, val);
                return ERROR_OK;
        }
 
        int mapped_regnum = nds32->register_map(nds32, reg_arch_info->num);
 
        if (reg_arch_info->enable == false) {
-               reg_arch_info->value = NDS32_REGISTER_DISABLE;
+               buf_set_u32(reg_arch_info->value, 0, 32, NDS32_REGISTER_DISABLE);
                retval = ERROR_FAIL;
        } else {
-               if ((nds32->fpu_enable == false) &&
-                       (NDS32_REG_TYPE_FPU == nds32_reg_type(mapped_regnum))) {
-                       reg_arch_info->value = 0;
+               uint32_t val = 0;
+               if ((nds32->fpu_enable == false)
+                               && (NDS32_REG_TYPE_FPU == nds32_reg_type(mapped_regnum))) {
                        retval = ERROR_OK;
-               } else if ((nds32->audio_enable == false) &&
-                       (NDS32_REG_TYPE_AUMR == nds32_reg_type(mapped_regnum))) {
-                       reg_arch_info->value = 0;
+               } else if ((nds32->audio_enable == false)
+                               && (NDS32_REG_TYPE_AUMR == nds32_reg_type(mapped_regnum))) {
                        retval = ERROR_OK;
                } else {
-                       retval = aice_read_register(aice,
-                                       mapped_regnum, &(reg_arch_info->value));
+                       retval = aice_read_register(aice, mapped_regnum, &val);
                }
+               buf_set_u32(reg_arch_info->value, 0, 32, val);
 
                LOG_DEBUG("reading register %" PRIi32 "(%s), value: 0x%8.8" PRIx32,
-                               reg_arch_info->num, reg->name, reg_arch_info->value);
+                               reg_arch_info->num, reg->name, val);
        }
 
        if (retval == ERROR_OK) {
@@ -139,17 +137,17 @@ static int nds32_get_core_reg_64(struct reg *reg)
                return ERROR_OK;
 
        if (reg_arch_info->enable == false) {
-               reg_arch_info->value_64 = NDS32_REGISTER_DISABLE;
+               buf_set_u64(reg_arch_info->value, 0, 64, NDS32_REGISTER_DISABLE);
                retval = ERROR_FAIL;
        } else {
-               if ((nds32->fpu_enable == false) &&
-                       ((FD0 <= reg_arch_info->num) && (reg_arch_info->num <= FD31))) {
-                       reg_arch_info->value_64 = 0;
+               uint64_t val = 0;
+               if ((nds32->fpu_enable == false)
+                               && ((FD0 <= reg_arch_info->num) && (reg_arch_info->num <= FD31))) {
                        retval = ERROR_OK;
                } else {
-                       retval = aice_read_reg_64(aice, reg_arch_info->num,
-                                       &(reg_arch_info->value_64));
+                       retval = aice_read_reg_64(aice, reg_arch_info->num, &val);
                }
+               buf_set_u64(reg_arch_info->value, 0, 64, val);
        }
 
        if (retval == ERROR_OK) {
@@ -322,11 +320,13 @@ static int nds32_set_core_reg(struct reg *reg, uint8_t *buf)
                buf_set_u32(reg->value, 0, 32, 0);
        } else {
                buf_set_u32(reg->value, 0, 32, value);
-               aice_write_register(aice, mapped_regnum, reg_arch_info->value);
+               uint32_t val = buf_get_u32(reg_arch_info->value, 0, 32);
+               aice_write_register(aice, mapped_regnum, val);
 
                /* After set value to registers, read the value from target
                 * to avoid W1C inconsistency. */
-               aice_read_register(aice, mapped_regnum, &(reg_arch_info->value));
+               aice_read_register(aice, mapped_regnum, &val);
+               buf_set_u32(reg_arch_info->value, 0, 32, val);
        }
 
        reg->valid = true;
@@ -426,14 +426,14 @@ static struct reg_cache *nds32_build_reg_cache(struct target *target,
                reg_list[i].reg_data_type = calloc(sizeof(struct reg_data_type), 1);
 
                if (FD0 <= reg_arch_info[i].num && reg_arch_info[i].num <= FD31) {
-                       reg_list[i].value = &(reg_arch_info[i].value_64);
+                       reg_list[i].value = reg_arch_info[i].value;
                        reg_list[i].type = &nds32_reg_access_type_64;
 
                        reg_list[i].reg_data_type->type = REG_TYPE_IEEE_DOUBLE;
                        reg_list[i].reg_data_type->id = "ieee_double";
                        reg_list[i].group = "float";
                } else {
-                       reg_list[i].value = &(reg_arch_info[i].value);
+                       reg_list[i].value = reg_arch_info[i].value;
                        reg_list[i].type = &nds32_reg_access_type;
                        reg_list[i].group = "general";
 
@@ -823,7 +823,7 @@ int nds32_read_memory(struct target *target, uint32_t address,
        return aice_read_mem_unit(aice, address, size, count, buffer);
 }
 
-int nds32_read_phys_memory(struct target *target, uint32_t address,
+int nds32_read_phys_memory(struct target *target, target_addr_t address,
                uint32_t size, uint32_t count, uint8_t *buffer)
 {
        struct aice_port_s *aice = target_to_aice(target);
@@ -932,7 +932,7 @@ int nds32_write_memory(struct target *target, uint32_t address,
        return aice_write_mem_unit(aice, address, size, count, buffer);
 }
 
-int nds32_write_phys_memory(struct target *target, uint32_t address,
+int nds32_write_phys_memory(struct target *target, target_addr_t address,
                uint32_t size, uint32_t count, const uint8_t *buffer)
 {
        struct aice_port_s *aice = target_to_aice(target);
@@ -1549,10 +1549,14 @@ int nds32_restore_context(struct target *target)
                                                i, buf_get_u32(reg->value, 0, 32));
 
                                reg_arch_info = reg->arch_info;
-                               if (FD0 <= reg_arch_info->num && reg_arch_info->num <= FD31)
-                                       aice_write_reg_64(aice, reg_arch_info->num, reg_arch_info->value_64);
-                               else
-                                       aice_write_register(aice, reg_arch_info->num, reg_arch_info->value);
+                               if (FD0 <= reg_arch_info->num && reg_arch_info->num <= FD31) {
+                                       uint64_t val = buf_get_u64(reg_arch_info->value, 0, 64);
+                                       aice_write_reg_64(aice, reg_arch_info->num, val);
+                               } else {
+                                       uint32_t val = buf_get_u32(reg_arch_info->value, 0, 32);
+                                       aice_write_register(aice, reg_arch_info->num, val);
+                               }
+
                                reg->valid = true;
                                reg->dirty = false;
                        }
@@ -1670,7 +1674,7 @@ int nds32_init_arch_info(struct target *target, struct nds32 *nds32)
        return ERROR_OK;
 }
 
-int nds32_virtual_to_physical(struct target *target, uint32_t address, uint32_t *physical)
+int nds32_virtual_to_physical(struct target *target, target_addr_t address, target_addr_t *physical)
 {
        struct nds32 *nds32 = target_to_nds32(target);
 
@@ -1688,7 +1692,7 @@ int nds32_virtual_to_physical(struct target *target, uint32_t address, uint32_t
        return ERROR_FAIL;
 }
 
-int nds32_cache_sync(struct target *target, uint32_t address, uint32_t length)
+int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t length)
 {
        struct aice_port_s *aice = target_to_aice(target);
        struct nds32 *nds32 = target_to_nds32(target);
@@ -1734,7 +1738,7 @@ int nds32_cache_sync(struct target *target, uint32_t address, uint32_t length)
                        /* Because PSW.IT is turned off under debug exception, address MUST
                         * be physical address.  L1I_VA_INVALIDATE uses PSW.IT to decide
                         * address translation or not. */
-                       uint32_t physical_addr;
+                       target_addr_t physical_addr;
                        if (ERROR_FAIL == target->type->virt2phys(target, cur_address,
                                                &physical_addr))
                                return ERROR_FAIL;
@@ -1760,7 +1764,7 @@ uint32_t nds32_nextpc(struct nds32 *nds32, int current, uint32_t address)
 }
 
 int nds32_step(struct target *target, int current,
-               uint32_t address, int handle_breakpoints)
+               target_addr_t address, int handle_breakpoints)
 {
        LOG_DEBUG("target->state: %s",
                        target_state_name(target));
@@ -1774,7 +1778,7 @@ int nds32_step(struct target *target, int current,
 
        address = nds32_nextpc(nds32, current, address);
 
-       LOG_DEBUG("STEP PC %08" PRIx32 "%s", address, !current ? "!" : "");
+       LOG_DEBUG("STEP PC %08" TARGET_PRIxADDR "%s", address, !current ? "!" : "");
 
        /** set DSSIM */
        uint32_t ir14_value;
@@ -2116,9 +2120,9 @@ int nds32_poll(struct target *target)
 }
 
 int nds32_resume(struct target *target, int current,
-               uint32_t address, int handle_breakpoints, int debug_execution)
+               target_addr_t address, int handle_breakpoints, int debug_execution)
 {
-       LOG_DEBUG("current %d address %08" PRIx32
+       LOG_DEBUG("current %d address %08" TARGET_PRIxADDR
                        " handle_breakpoints %d"
                        " debug_execution %d",
                        current, address, handle_breakpoints, debug_execution);
@@ -2132,7 +2136,7 @@ int nds32_resume(struct target *target, int current,
 
        address = nds32_nextpc(nds32, current, address);
 
-       LOG_DEBUG("RESUME PC %08" PRIx32 "%s", address, !current ? "!" : "");
+       LOG_DEBUG("RESUME PC %08" TARGET_PRIxADDR "%s", address, !current ? "!" : "");
 
        if (!debug_execution)
                target_free_all_working_areas(target);
@@ -2193,6 +2197,13 @@ int nds32_assert_reset(struct target *target)
        struct aice_port_s *aice = target_to_aice(target);
        struct nds32_cpu_version *cpu_version = &(nds32->cpu_version);
 
+       /* TODO: apply hw reset signal in not examined state */
+       if (!(target_was_examined(target))) {
+               LOG_WARNING("Reset is not asserted because the target is not examined.");
+               LOG_WARNING("Use a reset button or power cycle the target.");
+               return ERROR_TARGET_NOT_EXAMINED;
+       }
+
        if (target->reset_halt) {
                if ((nds32->soft_reset_halt)
                        || (nds32->edm.version < 0x51)
@@ -2328,63 +2339,66 @@ int nds32_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *fil
                fileio_info->identifier = NULL;
        }
 
+       uint32_t reg_r0, reg_r1, reg_r2;
+       nds32_get_mapped_reg(nds32, R0, &reg_r0);
+       nds32_get_mapped_reg(nds32, R1, &reg_r1);
+       nds32_get_mapped_reg(nds32, R2, &reg_r2);
+
        switch (syscall_id) {
                case NDS32_SYSCALL_EXIT:
                        fileio_info->identifier = malloc(5);
                        sprintf(fileio_info->identifier, "exit");
-                       nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+                       fileio_info->param_1 = reg_r0;
                        break;
                case NDS32_SYSCALL_OPEN:
                        {
                                uint8_t filename[256];
                                fileio_info->identifier = malloc(5);
                                sprintf(fileio_info->identifier, "open");
-                               nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+                               fileio_info->param_1 = reg_r0;
                                /* reserve fileio_info->param_2 for length of path */
-                               nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_3));
-                               nds32_get_mapped_reg(nds32, R2, &(fileio_info->param_4));
+                               fileio_info->param_3 = reg_r1;
+                               fileio_info->param_4 = reg_r2;
 
-                               target->type->read_buffer(target, fileio_info->param_1,
-                                               256, filename);
+                               target->type->read_buffer(target, reg_r0, 256, filename);
                                fileio_info->param_2 = strlen((char *)filename) + 1;
                        }
                        break;
                case NDS32_SYSCALL_CLOSE:
                        fileio_info->identifier = malloc(6);
                        sprintf(fileio_info->identifier, "close");
-                       nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+                       fileio_info->param_1 = reg_r0;
                        break;
                case NDS32_SYSCALL_READ:
                        fileio_info->identifier = malloc(5);
                        sprintf(fileio_info->identifier, "read");
-                       nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
-                       nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_2));
-                       nds32_get_mapped_reg(nds32, R2, &(fileio_info->param_3));
+                       fileio_info->param_1 = reg_r0;
+                       fileio_info->param_2 = reg_r1;
+                       fileio_info->param_3 = reg_r2;
                        break;
                case NDS32_SYSCALL_WRITE:
                        fileio_info->identifier = malloc(6);
                        sprintf(fileio_info->identifier, "write");
-                       nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
-                       nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_2));
-                       nds32_get_mapped_reg(nds32, R2, &(fileio_info->param_3));
+                       fileio_info->param_1 = reg_r0;
+                       fileio_info->param_2 = reg_r1;
+                       fileio_info->param_3 = reg_r2;
                        break;
                case NDS32_SYSCALL_LSEEK:
                        fileio_info->identifier = malloc(6);
                        sprintf(fileio_info->identifier, "lseek");
-                       nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
-                       nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_2));
-                       nds32_get_mapped_reg(nds32, R2, &(fileio_info->param_3));
+                       fileio_info->param_1 = reg_r0;
+                       fileio_info->param_2 = reg_r1;
+                       fileio_info->param_3 = reg_r2;
                        break;
                case NDS32_SYSCALL_UNLINK:
                        {
                                uint8_t filename[256];
                                fileio_info->identifier = malloc(7);
                                sprintf(fileio_info->identifier, "unlink");
-                               nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+                               fileio_info->param_1 = reg_r0;
                                /* reserve fileio_info->param_2 for length of path */
 
-                               target->type->read_buffer(target, fileio_info->param_1,
-                                               256, filename);
+                               target->type->read_buffer(target, reg_r0, 256, filename);
                                fileio_info->param_2 = strlen((char *)filename) + 1;
                        }
                        break;
@@ -2393,61 +2407,57 @@ int nds32_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *fil
                                uint8_t filename[256];
                                fileio_info->identifier = malloc(7);
                                sprintf(fileio_info->identifier, "rename");
-                               nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+                               fileio_info->param_1 = reg_r0;
                                /* reserve fileio_info->param_2 for length of old path */
-                               nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_3));
+                               fileio_info->param_3 = reg_r1;
                                /* reserve fileio_info->param_4 for length of new path */
 
-                               target->type->read_buffer(target, fileio_info->param_1,
-                                               256, filename);
+                               target->type->read_buffer(target, reg_r0, 256, filename);
                                fileio_info->param_2 = strlen((char *)filename) + 1;
 
-                               target->type->read_buffer(target, fileio_info->param_3,
-                                               256, filename);
+                               target->type->read_buffer(target, reg_r1, 256, filename);
                                fileio_info->param_4 = strlen((char *)filename) + 1;
                        }
                        break;
                case NDS32_SYSCALL_FSTAT:
                        fileio_info->identifier = malloc(6);
                        sprintf(fileio_info->identifier, "fstat");
-                       nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
-                       nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_2));
+                       fileio_info->param_1 = reg_r0;
+                       fileio_info->param_2 = reg_r1;
                        break;
                case NDS32_SYSCALL_STAT:
                        {
                                uint8_t filename[256];
                                fileio_info->identifier = malloc(5);
                                sprintf(fileio_info->identifier, "stat");
-                               nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+                               fileio_info->param_1 = reg_r0;
                                /* reserve fileio_info->param_2 for length of old path */
-                               nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_3));
+                               fileio_info->param_3 = reg_r1;
 
-                               target->type->read_buffer(target, fileio_info->param_1,
-                                               256, filename);
+                               target->type->read_buffer(target, reg_r0, 256, filename);
                                fileio_info->param_2 = strlen((char *)filename) + 1;
                        }
                        break;
                case NDS32_SYSCALL_GETTIMEOFDAY:
                        fileio_info->identifier = malloc(13);
                        sprintf(fileio_info->identifier, "gettimeofday");
-                       nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
-                       nds32_get_mapped_reg(nds32, R1, &(fileio_info->param_2));
+                       fileio_info->param_1 = reg_r0;
+                       fileio_info->param_2 = reg_r1;
                        break;
                case NDS32_SYSCALL_ISATTY:
                        fileio_info->identifier = malloc(7);
                        sprintf(fileio_info->identifier, "isatty");
-                       nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+                       fileio_info->param_1 = reg_r0;
                        break;
                case NDS32_SYSCALL_SYSTEM:
                        {
                                uint8_t command[256];
                                fileio_info->identifier = malloc(7);
                                sprintf(fileio_info->identifier, "system");
-                               nds32_get_mapped_reg(nds32, R0, &(fileio_info->param_1));
+                               fileio_info->param_1 = reg_r0;
                                /* reserve fileio_info->param_2 for length of old path */
 
-                               target->type->read_buffer(target, fileio_info->param_1,
-                                               256, command);
+                               target->type->read_buffer(target, reg_r0, 256, command);
                                fileio_info->param_2 = strlen((char *)command) + 1;
                        }
                        break;
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)