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armv7a: ARMv7-A MMU tools
[openocd.git] / src / target / nds32_v2.c
diff --git a/src/target/nds32_v2.c b/src/target/nds32_v2.c
index 24f5108ccb2d2b07dedfbd6374985efb8a9726c2..29489a0341c6ff707eb1e2420c46868eaf495acb 100644 (file)
--- a/src/target/nds32_v2.c
+++ b/src/target/nds32_v2.c
@@ -13,9 +13,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -114,7 +112,7 @@ static int nds32_v2_activate_hardware_breakpoint(struct target *target)
                                /* enable breakpoint (physical address) */
                                aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + hbr_index, 0xA);
 
-                       LOG_DEBUG("Add hardware BP %d at %08" PRIx32, hbr_index,
+                       LOG_DEBUG("Add hardware BP %" PRId32 " at %08" TARGET_PRIxADDR, hbr_index,
                                        bp->address);
 
                        hbr_index++;
@@ -141,7 +139,7 @@ static int nds32_v2_deactivate_hardware_breakpoint(struct target *target)
                else
                        return ERROR_FAIL;
 
-               LOG_DEBUG("Remove hardware BP %d at %08" PRIx32, hbr_index,
+               LOG_DEBUG("Remove hardware BP %" PRId32 " at %08" TARGET_PRIxADDR, hbr_index,
                                bp->address);
 
                hbr_index++;
@@ -186,7 +184,7 @@ static int nds32_v2_activate_hardware_watchpoint(struct target *target)
                /* set value */
                aice_write_debug_reg(aice, NDS_EDM_SR_BPV0 + wp_num, 0);
 
-               LOG_DEBUG("Add hardware wathcpoint %d at %08" PRIx32 " mask %08" PRIx32, wp_num,
+               LOG_DEBUG("Add hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR " mask %08" PRIx32, wp_num,
                                wp->address, wp->mask);
 
        }
@@ -206,7 +204,7 @@ static int nds32_v2_deactivate_hardware_watchpoint(struct target *target)
                /* disable watchpoint */
                aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + wp_num, 0x0);
 
-               LOG_DEBUG("Remove hardware wathcpoint %d at %08" PRIx32 " mask %08" PRIx32,
+               LOG_DEBUG("Remove hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR " mask %08" PRIx32,
                                wp_num, wp->address, wp->mask);
        }
 
@@ -231,7 +229,7 @@ static int nds32_v2_check_interrupt_stack(struct nds32_v2_common *nds32_v2)
        nds32->current_interrupt_level = (val_ir0 >> 1) & 0x3;
 
        if (nds32_reach_max_interrupt_level(nds32)) {
-               LOG_ERROR("<-- TARGET ERROR! Reaching the max interrupt stack level %d. -->",
+               LOG_ERROR("<-- TARGET ERROR! Reaching the max interrupt stack level %" PRIu32 ". -->",
                                nds32->current_interrupt_level);
 
                /* decrease interrupt level */
@@ -407,7 +405,7 @@ static int nds32_v2_deassert_reset(struct target *target)
 }
 
 static int nds32_v2_checksum_memory(struct target *target,
-               uint32_t address, uint32_t count, uint32_t *checksum)
+               target_addr_t address, uint32_t count, uint32_t *checksum)
 {
        LOG_WARNING("Not implemented: %s", __func__);
 
@@ -427,7 +425,7 @@ static int nds32_v2_add_breakpoint(struct target *target,
                        LOG_WARNING("<-- TARGET WARNING! Insert too many hardware "
                                        "breakpoints/watchpoints!  The limit of "
                                        "combined hardware breakpoints/watchpoints "
-                                       "is %d. -->", nds32_v2->n_hbr);
+                                       "is %" PRId32 ". -->", nds32_v2->n_hbr);
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
 
@@ -486,7 +484,7 @@ static int nds32_v2_add_watchpoint(struct target *target,
        if (nds32_v2->n_hbr <= nds32_v2->next_hbr_index) {
                LOG_WARNING("<-- TARGET WARNING! Insert too many hardware "
                                "breakpoints/watchpoints!  The limit of "
-                               "combined hardware breakpoints/watchpoints is %d. -->", nds32_v2->n_hbr);
+                               "combined hardware breakpoints/watchpoints is %" PRId32 ". -->", nds32_v2->n_hbr);
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
@@ -563,8 +561,8 @@ static int nds32_v2_run_algorithm(struct target *target,
                struct mem_param *mem_params,
                int num_reg_params,
                struct reg_param *reg_params,
-               uint32_t entry_point,
-               uint32_t exit_point,
+               target_addr_t entry_point,
+               target_addr_t exit_point,
                int timeout_ms,
                void *arch_info)
 {
@@ -626,7 +624,7 @@ static int nds32_v2_examine(struct target *target)
 
        nds32_v2->next_hbr_index = 0;
 
-       LOG_INFO("%s: total hardware breakpoint %d", target_name(target),
+       LOG_INFO("%s: total hardware breakpoint %" PRId32, target_name(target),
                        nds32_v2->n_hbr);
 
        nds32->target->state = TARGET_RUNNING;
@@ -637,11 +635,11 @@ static int nds32_v2_examine(struct target *target)
        return ERROR_OK;
 }
 
-static int nds32_v2_translate_address(struct target *target, uint32_t *address)
+static int nds32_v2_translate_address(struct target *target, target_addr_t *address)
 {
        struct nds32 *nds32 = target_to_nds32(target);
        struct nds32_memory *memory = &(nds32->memory);
-       uint32_t physical_address;
+       target_addr_t physical_address;
 
        /* Following conditions need to do address translation
         * 1. BUS mode
@@ -658,7 +656,7 @@ static int nds32_v2_translate_address(struct target *target, uint32_t *address)
        return ERROR_OK;
 }
 
-static int nds32_v2_read_buffer(struct target *target, uint32_t address,
+static int nds32_v2_read_buffer(struct target *target, target_addr_t address,
                uint32_t size, uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);
@@ -678,7 +676,7 @@ static int nds32_v2_read_buffer(struct target *target, uint32_t address,
        return nds32_read_buffer(target, address, size, buffer);
 }
 
-static int nds32_v2_write_buffer(struct target *target, uint32_t address,
+static int nds32_v2_write_buffer(struct target *target, target_addr_t address,
                uint32_t size, const uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);
@@ -698,7 +696,7 @@ static int nds32_v2_write_buffer(struct target *target, uint32_t address,
        return nds32_write_buffer(target, address, size, buffer);
 }
 
-static int nds32_v2_read_memory(struct target *target, uint32_t address,
+static int nds32_v2_read_memory(struct target *target, target_addr_t address,
                uint32_t size, uint32_t count, uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);
@@ -718,7 +716,7 @@ static int nds32_v2_read_memory(struct target *target, uint32_t address,
        return nds32_read_memory(target, address, size, count, buffer);
 }
 
-static int nds32_v2_write_memory(struct target *target, uint32_t address,
+static int nds32_v2_write_memory(struct target *target, target_addr_t address,
                uint32_t size, uint32_t count, const uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);
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