Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
armv7a: ARMv7-A MMU tools
[openocd.git] / src / target / nds32_v2.c
diff --git a/src/target/nds32_v2.c b/src/target/nds32_v2.c
index ceeed0af35624f1d243b3f3d1068eee34189692d..29489a0341c6ff707eb1e2420c46868eaf495acb 100644 (file)
--- a/src/target/nds32_v2.c
+++ b/src/target/nds32_v2.c
@@ -13,9 +13,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -114,7 +112,7 @@ static int nds32_v2_activate_hardware_breakpoint(struct target *target)
                                /* enable breakpoint (physical address) */
                                aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + hbr_index, 0xA);
 
-                       LOG_DEBUG("Add hardware BP %d at %08" PRIx32, hbr_index,
+                       LOG_DEBUG("Add hardware BP %" PRId32 " at %08" TARGET_PRIxADDR, hbr_index,
                                        bp->address);
 
                        hbr_index++;
@@ -141,7 +139,7 @@ static int nds32_v2_deactivate_hardware_breakpoint(struct target *target)
                else
                        return ERROR_FAIL;
 
-               LOG_DEBUG("Remove hardware BP %d at %08" PRIx32, hbr_index,
+               LOG_DEBUG("Remove hardware BP %" PRId32 " at %08" TARGET_PRIxADDR, hbr_index,
                                bp->address);
 
                hbr_index++;
@@ -186,7 +184,7 @@ static int nds32_v2_activate_hardware_watchpoint(struct target *target)
                /* set value */
                aice_write_debug_reg(aice, NDS_EDM_SR_BPV0 + wp_num, 0);
 
-               LOG_DEBUG("Add hardware wathcpoint %d at %08" PRIx32 " mask %08" PRIx32, wp_num,
+               LOG_DEBUG("Add hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR " mask %08" PRIx32, wp_num,
                                wp->address, wp->mask);
 
        }
@@ -206,7 +204,7 @@ static int nds32_v2_deactivate_hardware_watchpoint(struct target *target)
                /* disable watchpoint */
                aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + wp_num, 0x0);
 
-               LOG_DEBUG("Remove hardware wathcpoint %d at %08" PRIx32 " mask %08" PRIx32,
+               LOG_DEBUG("Remove hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR " mask %08" PRIx32,
                                wp_num, wp->address, wp->mask);
        }
 
@@ -231,7 +229,7 @@ static int nds32_v2_check_interrupt_stack(struct nds32_v2_common *nds32_v2)
        nds32->current_interrupt_level = (val_ir0 >> 1) & 0x3;
 
        if (nds32_reach_max_interrupt_level(nds32)) {
-               LOG_ERROR("<-- TARGET ERROR! Reaching the max interrupt stack level %d. -->",
+               LOG_ERROR("<-- TARGET ERROR! Reaching the max interrupt stack level %" PRIu32 ". -->",
                                nds32->current_interrupt_level);
 
                /* decrease interrupt level */
@@ -287,8 +285,6 @@ static int nds32_v2_debug_entry(struct nds32 *nds32, bool enable_watchpoint)
 {
        LOG_DEBUG("nds32_v2_debug_entry");
 
-       jtag_poll_set_enabled(false);
-
        if (nds32->virtual_hosting)
                LOG_WARNING("<-- TARGET WARNING! Virtual hosting is not supported "
                                "under V1/V2 architecture. -->");
@@ -387,29 +383,6 @@ static int nds32_v2_leave_debug_state(struct nds32 *nds32, bool enable_watchpoin
 
        register_cache_invalidate(nds32->core_cache);
 
-       jtag_poll_set_enabled(true);
-
-       return ERROR_OK;
-}
-
-static int nds32_v2_soft_reset_halt(struct target *target)
-{
-       /* TODO: test it */
-       struct nds32 *nds32 = target_to_nds32(target);
-       struct aice_port_s *aice = target_to_aice(target);
-
-       aice_assert_srst(aice, AICE_SRST);
-
-       /* halt core and set pc to 0x0 */
-       int retval = target_halt(target);
-       if (retval != ERROR_OK)
-               return retval;
-
-       /* start fetching from IVB */
-       uint32_t value_ir3;
-       nds32_get_mapped_reg(nds32, IR3, &value_ir3);
-       nds32_set_mapped_reg(nds32, PC, value_ir3 & 0xFFFF0000);
-
        return ERROR_OK;
 }
 
@@ -426,17 +399,13 @@ static int nds32_v2_deassert_reset(struct target *target)
                retval = target_halt(target);
                if (retval != ERROR_OK)
                        return retval;
-               /* call target_poll() to avoid "Halt timed out" */
-               CHECK_RETVAL(target_poll(target));
-       } else {
-               jtag_poll_set_enabled(false);
        }
 
        return ERROR_OK;
 }
 
 static int nds32_v2_checksum_memory(struct target *target,
-               uint32_t address, uint32_t count, uint32_t *checksum)
+               target_addr_t address, uint32_t count, uint32_t *checksum)
 {
        LOG_WARNING("Not implemented: %s", __func__);
 
@@ -456,7 +425,7 @@ static int nds32_v2_add_breakpoint(struct target *target,
                        LOG_WARNING("<-- TARGET WARNING! Insert too many hardware "
                                        "breakpoints/watchpoints!  The limit of "
                                        "combined hardware breakpoints/watchpoints "
-                                       "is %d. -->", nds32_v2->n_hbr);
+                                       "is %" PRId32 ". -->", nds32_v2->n_hbr);
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
 
@@ -515,7 +484,7 @@ static int nds32_v2_add_watchpoint(struct target *target,
        if (nds32_v2->n_hbr <= nds32_v2->next_hbr_index) {
                LOG_WARNING("<-- TARGET WARNING! Insert too many hardware "
                                "breakpoints/watchpoints!  The limit of "
-                               "combined hardware breakpoints/watchpoints is %d. -->", nds32_v2->n_hbr);
+                               "combined hardware breakpoints/watchpoints is %" PRId32 ". -->", nds32_v2->n_hbr);
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
@@ -592,8 +561,8 @@ static int nds32_v2_run_algorithm(struct target *target,
                struct mem_param *mem_params,
                int num_reg_params,
                struct reg_param *reg_params,
-               uint32_t entry_point,
-               uint32_t exit_point,
+               target_addr_t entry_point,
+               target_addr_t exit_point,
                int timeout_ms,
                void *arch_info)
 {
@@ -655,7 +624,7 @@ static int nds32_v2_examine(struct target *target)
 
        nds32_v2->next_hbr_index = 0;
 
-       LOG_INFO("%s: total hardware breakpoint %d", target_name(target),
+       LOG_INFO("%s: total hardware breakpoint %" PRId32, target_name(target),
                        nds32_v2->n_hbr);
 
        nds32->target->state = TARGET_RUNNING;
@@ -666,11 +635,11 @@ static int nds32_v2_examine(struct target *target)
        return ERROR_OK;
 }
 
-static int nds32_v2_translate_address(struct target *target, uint32_t *address)
+static int nds32_v2_translate_address(struct target *target, target_addr_t *address)
 {
        struct nds32 *nds32 = target_to_nds32(target);
        struct nds32_memory *memory = &(nds32->memory);
-       uint32_t physical_address;
+       target_addr_t physical_address;
 
        /* Following conditions need to do address translation
         * 1. BUS mode
@@ -687,7 +656,7 @@ static int nds32_v2_translate_address(struct target *target, uint32_t *address)
        return ERROR_OK;
 }
 
-static int nds32_v2_read_buffer(struct target *target, uint32_t address,
+static int nds32_v2_read_buffer(struct target *target, target_addr_t address,
                uint32_t size, uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);
@@ -707,7 +676,7 @@ static int nds32_v2_read_buffer(struct target *target, uint32_t address,
        return nds32_read_buffer(target, address, size, buffer);
 }
 
-static int nds32_v2_write_buffer(struct target *target, uint32_t address,
+static int nds32_v2_write_buffer(struct target *target, target_addr_t address,
                uint32_t size, const uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);
@@ -727,7 +696,7 @@ static int nds32_v2_write_buffer(struct target *target, uint32_t address,
        return nds32_write_buffer(target, address, size, buffer);
 }
 
-static int nds32_v2_read_memory(struct target *target, uint32_t address,
+static int nds32_v2_read_memory(struct target *target, target_addr_t address,
                uint32_t size, uint32_t count, uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);
@@ -747,7 +716,7 @@ static int nds32_v2_read_memory(struct target *target, uint32_t address,
        return nds32_read_memory(target, address, size, count, buffer);
 }
 
-static int nds32_v2_write_memory(struct target *target, uint32_t address,
+static int nds32_v2_write_memory(struct target *target, target_addr_t address,
                uint32_t size, uint32_t count, const uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);
@@ -782,7 +751,6 @@ struct target_type nds32_v2_target = {
 
        .assert_reset = nds32_assert_reset,
        .deassert_reset = nds32_v2_deassert_reset,
-       .soft_reset_halt = nds32_v2_soft_reset_halt,
 
        /* register access */
        .get_gdb_reg_list = nds32_get_gdb_reg_list,
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)