#include "nds32_aice.h"
#include "nds32_v3_common.h"
-static struct breakpoint syscall_breakpoint = {
- 0x80,
- 0,
- 4,
- BKPT_SOFT,
- 0,
- NULL,
- NULL,
- 0x515CA11,
- 0,
-};
-
static struct nds32_v3_common_callback *v3_common_callback;
static int nds32_v3_register_mapping(struct nds32 *nds32, int reg_no)
if (enable_watchpoint)
CHECK_RETVAL(v3_common_callback->deactivate_hardware_watchpoint(nds32->target));
+ struct breakpoint *syscall_break = &(nds32->syscall_break);
if (nds32->virtual_hosting) {
- if (syscall_breakpoint.set) {
+ if (syscall_break->set) {
/** disable virtual hosting */
/* remove breakpoint at syscall entry */
- target_remove_breakpoint(nds32->target, &syscall_breakpoint);
- syscall_breakpoint.set = 0;
+ target_remove_breakpoint(nds32->target, syscall_break);
+ syscall_break->set = 0;
uint32_t value_pc;
nds32_get_mapped_reg(nds32, PC, &value_pc);
- if (value_pc == syscall_breakpoint.address)
+ if (value_pc == syscall_break->address)
/** process syscall for virtual hosting */
nds32->hit_syscall = true;
}
}
/* insert breakpoint at syscall entry */
- syscall_breakpoint.address = syscall_address;
- syscall_breakpoint.type = BKPT_SOFT;
- syscall_breakpoint.set = 1;
- target_add_breakpoint(target, &syscall_breakpoint);
+ struct breakpoint *syscall_break = &(nds32->syscall_break);
+
+ syscall_break->address = syscall_address;
+ syscall_break->type = BKPT_SOFT;
+ syscall_break->set = 1;
+ target_add_breakpoint(target, syscall_break);
}
return ERROR_OK;
nds32_read_opcode(nds32, val_pc, &opcode);
nds32_evaluate_opcode(nds32, opcode, val_pc, &instruction);
- LOG_DEBUG("PC: 0x%08x, access start: 0x%08x, end: 0x%08x", val_pc,
- instruction.access_start, instruction.access_end);
+ LOG_DEBUG("PC: 0x%08" PRIx32 ", access start: 0x%08" PRIx32 ", end: 0x%08" PRIx32,
+ val_pc, instruction.access_start, instruction.access_end);
/* check if multiple hits in the access range */
uint32_t in_range_watch_count = 0;
return ERROR_OK;
}
-int nds32_v3_soft_reset_halt(struct target *target)
-{
- struct aice_port_s *aice = target_to_aice(target);
- return aice_assert_srst(aice, AICE_RESET_HOLD);
-}
-
int nds32_v3_checksum_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *checksum)
{
return ERROR_FAIL;
if (nds32->hit_syscall) {
- /* Use bus mode to access memory during virtual hosting */
struct aice_port_s *aice = target_to_aice(target);
enum nds_memory_access origin_access_channel;
- int result;
-
origin_access_channel = memory->access_channel;
- memory->access_channel = NDS_MEMORY_ACC_BUS;
- aice_memory_access(aice, NDS_MEMORY_ACC_BUS);
+ /* If target has no cache, use BUS mode to access memory. */
+ if ((memory->dcache.line_size == 0)
+ || (memory->dcache.enable == false)) {
+ /* There is no Dcache or Dcache is disabled. */
+ memory->access_channel = NDS_MEMORY_ACC_BUS;
+ aice_memory_access(aice, NDS_MEMORY_ACC_BUS);
+ }
+
+ int result;
result = nds32_gdb_fileio_write_memory(nds32, address, size, buffer);
- memory->access_channel = origin_access_channel;
- aice_memory_access(aice, origin_access_channel);
+ if (NDS_MEMORY_ACC_CPU == origin_access_channel) {
+ memory->access_channel = NDS_MEMORY_ACC_CPU;
+ aice_memory_access(aice, NDS_MEMORY_ACC_CPU);
+ }
return result;
}