return tt->step(target, current, address, handle_breakpoints);
}
-static int old_or_new_riscv_step(
- struct target *target,
- int current,
- target_addr_t address,
- int handle_breakpoints
-){
+static int old_or_new_riscv_step(struct target *target, int current,
+ target_addr_t address, int handle_breakpoints)
+{
RISCV_INFO(r);
LOG_DEBUG("handle_breakpoints=%d", handle_breakpoints);
if (r->is_halted == NULL)
debug_execution);
}
-static int old_or_new_riscv_resume(
- struct target *target,
- int current,
- target_addr_t address,
- int handle_breakpoints,
- int debug_execution
-){
+static int old_or_new_riscv_resume(struct target *target, int current,
+ target_addr_t address, int handle_breakpoints, int debug_execution)
+{
LOG_DEBUG("handle_breakpoints=%d", handle_breakpoints);
if (target->smp) {
struct target_list *targets = target->head;
return out;
}
-int riscv_openocd_step(
- struct target *target,
- int current,
- target_addr_t address,
- int handle_breakpoints
-) {
+int riscv_openocd_step(struct target *target, int current,
+ target_addr_t address, int handle_breakpoints)
+{
LOG_DEBUG("stepping rtos hart");
if (!current)
.name = "test_sba_config_reg",
.handler = riscv_test_sba_config_reg,
.mode = COMMAND_ANY,
- .usage = "riscv test_sba_config_reg legal_address num_words"
+ .usage = "riscv test_sba_config_reg legal_address num_words "
"illegal_address run_sbbusyerror_test[on/off]",
- .help = "Perform a series of tests on the SBCS register."
- "Inputs are a legal, 128-byte aligned address and a number of words to"
- "read/write starting at that address (i.e., address range [legal address,"
- "legal_address+word_size*num_words) must be legally readable/writable)"
- ", an illegal, 128-byte aligned address for error flag/handling cases,"
+ .help = "Perform a series of tests on the SBCS register. "
+ "Inputs are a legal, 128-byte aligned address and a number of words to "
+ "read/write starting at that address (i.e., address range [legal address, "
+ "legal_address+word_size*num_words) must be legally readable/writable), "
+ "an illegal, 128-byte aligned address for error flag/handling cases, "
"and whether sbbusyerror test should be run."
},
{
COMMAND_REGISTRATION_DONE
};
-extern __COMMAND_HANDLER(handle_common_semihosting_command);
-extern __COMMAND_HANDLER(handle_common_semihosting_fileio_command);
-extern __COMMAND_HANDLER(handle_common_semihosting_resumable_exit_command);
-extern __COMMAND_HANDLER(handle_common_semihosting_cmdline);
-
/*
* To be noted that RISC-V targets use the same semihosting commands as
* ARM targets.
* protocol, then a command like `riscv semihosting enable` will make
* sense, but for now all semihosting commands are prefixed with `arm`.
*/
-static const struct command_registration arm_exec_command_handlers[] = {
- {
- .name = "semihosting",
- .handler = handle_common_semihosting_command,
- .mode = COMMAND_EXEC,
- .usage = "['enable'|'disable']",
- .help = "activate support for semihosting operations",
- },
- {
- .name = "semihosting_cmdline",
- .handler = handle_common_semihosting_cmdline,
- .mode = COMMAND_EXEC,
- .usage = "arguments",
- .help = "command line arguments to be passed to program",
- },
- {
- .name = "semihosting_fileio",
- .handler = handle_common_semihosting_fileio_command,
- .mode = COMMAND_EXEC,
- .usage = "['enable'|'disable']",
- .help = "activate support for semihosting fileio operations",
- },
- {
- .name = "semihosting_resexit",
- .handler = handle_common_semihosting_resumable_exit_command,
- .mode = COMMAND_EXEC,
- .usage = "['enable'|'disable']",
- .help = "activate support for semihosting resumable exit",
- },
- COMMAND_REGISTRATION_DONE
-};
+extern const struct command_registration semihosting_common_handlers[];
const struct command_registration riscv_command_handlers[] = {
{
.mode = COMMAND_ANY,
.help = "ARM Command Group",
.usage = "",
- .chain = arm_exec_command_handlers
+ .chain = semihosting_common_handlers
},
COMMAND_REGISTRATION_DONE
};