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stlink: add missing memory check handlers
[openocd.git] / src / target / stm32_stlink.c
diff --git a/src/target/stm32_stlink.c b/src/target/stm32_stlink.c
index baa6b7488cea60ee11b23044bb6749d037270f8b..3a4b58be9cd99627aa9e4c8731202a36b89736d8 100644 (file)
--- a/src/target/stm32_stlink.c
+++ b/src/target/stm32_stlink.c
@@ -2,6 +2,9 @@
  *   Copyright (C) 2011 by Mathias Kuester                                 *
  *   Mathias Kuester <kesmtp@freenet.de>                                   *
  *                                                                         *
+ *   Copyright (C) 2011 by Spencer Oliver                                  *
+ *   spen@spen-soft.co.uk                                                  *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -98,7 +101,7 @@ static int stm32_stlink_load_core_reg_u32(struct target *target,
                break;
 
        default:
-               return ERROR_INVALID_ARGUMENTS;
+               return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
        return ERROR_OK;
@@ -133,9 +136,7 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
         */
        switch (num) {
        case 0 ... 18:
-               retval =
-                   stlink_if->layout->api->write_reg(stlink_if->fd, num,
-                                                     value);
+               retval = stlink_if->layout->api->write_reg(stlink_if->fd, num, value);
 
                if (retval != ERROR_OK) {
                        struct reg *r;
@@ -145,8 +146,7 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
                        r->dirty = r->valid;
                        return ERROR_JTAG_DEVICE_ERROR;
                }
-               LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num,
-                         value);
+               LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num, value);
                break;
 
        case ARMV7M_PRIMASK:
@@ -157,7 +157,8 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
                 * in one Debug Core register.  So say r0 and r2 docs;
                 * it was removed from r1 docs, but still works.
                 */
-               /* cortexm3_dap_read_coreregister_u32(swjdp, &reg, 20); */
+
+               stlink_if->layout->api->read_reg(stlink_if->fd, 20, &reg);
 
                switch (num) {
                case ARMV7M_PRIMASK:
@@ -177,14 +178,23 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
                        break;
                }
 
-               /* cortexm3_dap_write_coreregister_u32(swjdp, reg, 20); */
+               stlink_if->layout->api->write_reg(stlink_if->fd, 20, reg);
 
-               LOG_DEBUG("write special reg %i value 0x%" PRIx32 " ", (int)num,
-                         value);
+               LOG_DEBUG("write special reg %i value 0x%" PRIx32 " ", (int)num, value);
                break;
 
        default:
-               return ERROR_INVALID_ARGUMENTS;
+               return ERROR_COMMAND_SYNTAX_ERROR;
+       }
+
+       return ERROR_OK;
+}
+
+static int stm32_stlink_examine_debug_reason(struct target *target)
+{
+       if ((target->debug_reason != DBG_REASON_DBGRQ)
+                       && (target->debug_reason != DBG_REASON_SINGLESTEP)) {
+               target->debug_reason = DBG_REASON_BREAKPOINT;
        }
 
        return ERROR_OK;
@@ -204,6 +214,8 @@ static int stm32_stlink_init_arch_info(struct target *target,
        armv7m->load_core_reg_u32 = stm32_stlink_load_core_reg_u32;
        armv7m->store_core_reg_u32 = stm32_stlink_store_core_reg_u32;
 
+       armv7m->examine_debug_reason = stm32_stlink_examine_debug_reason;
+
        return ERROR_OK;
 }
 
@@ -225,15 +237,13 @@ static int stm32_stlink_target_create(struct target *target,
        struct cortex_m3_common *cortex_m3 = calloc(1, sizeof(struct cortex_m3_common));
 
        if (!cortex_m3)
-               return ERROR_INVALID_ARGUMENTS;
+               return ERROR_COMMAND_SYNTAX_ERROR;
 
        stm32_stlink_init_arch_info(target, cortex_m3, target->tap);
 
        return ERROR_OK;
 }
 
-static int stm32_stlink_poll(struct target *target);
-
 static int stm32_stlink_examine(struct target *target)
 {
        int retval, i;
@@ -245,14 +255,12 @@ static int stm32_stlink_examine(struct target *target)
        if (target->tap->hasidcode == false) {
                LOG_ERROR("no IDCODE present on device");
 
-               return ERROR_INVALID_ARGUMENTS;
+               return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
        if (!target_was_examined(target)) {
                target_set_examined(target);
 
-               stm32_stlink_poll(target);
-
                LOG_INFO("IDCODE %x", target->tap->idcode);
 
                /* Read from Device Identification Registers */
@@ -299,8 +307,9 @@ static int stm32_stlink_examine(struct target *target)
 static int stm32_stlink_load_context(struct target *target)
 {
        struct armv7m_common *armv7m = target_to_armv7m(target);
+       int num_regs = armv7m->core_cache->num_regs;
 
-       for (unsigned i = 0; i < 23; i++) {
+       for (int i = 0; i < num_regs; i++) {
                if (!armv7m->core_cache->reg_list[i].valid)
                        armv7m->read_core_reg(target, i);
        }
@@ -308,6 +317,57 @@ static int stm32_stlink_load_context(struct target *target)
        return ERROR_OK;
 }
 
+static int stlink_debug_entry(struct target *target)
+{
+       struct armv7m_common *armv7m = target_to_armv7m(target);
+       struct arm *arm = &armv7m->arm;
+       struct reg *r;
+       uint32_t xPSR;
+       int retval;
+
+       retval = armv7m->examine_debug_reason(target);
+       if (retval != ERROR_OK)
+               return retval;
+
+       stm32_stlink_load_context(target);
+
+       r = armv7m->core_cache->reg_list + ARMV7M_xPSR;
+       xPSR = buf_get_u32(r->value, 0, 32);
+
+       /* Are we in an exception handler */
+       if (xPSR & 0x1FF) {
+               armv7m->core_mode = ARMV7M_MODE_HANDLER;
+               armv7m->exception_number = (xPSR & 0x1FF);
+
+               arm->core_mode = ARM_MODE_HANDLER;
+               arm->map = armv7m_msp_reg_map;
+       } else {
+               unsigned control = buf_get_u32(armv7m->core_cache
+                               ->reg_list[ARMV7M_CONTROL].value, 0, 2);
+
+               /* is this thread privileged? */
+               armv7m->core_mode = control & 1;
+               arm->core_mode = armv7m->core_mode
+                               ? ARM_MODE_USER_THREAD
+                               : ARM_MODE_THREAD;
+
+               /* which stack is it using? */
+               if (control & 2)
+                       arm->map = armv7m_psp_reg_map;
+               else
+                       arm->map = armv7m_msp_reg_map;
+
+               armv7m->exception_number = 0;
+       }
+
+       LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s",
+               armv7m_mode_strings[armv7m->core_mode],
+               *(uint32_t *)(arm->pc->value),
+               target_state_name(target));
+
+       return retval;
+}
+
 static int stm32_stlink_poll(struct target *target)
 {
        enum target_state state;
@@ -317,8 +377,7 @@ static int stm32_stlink_poll(struct target *target)
        state = stlink_if->layout->api->state(stlink_if->fd);
 
        if (state == TARGET_UNKNOWN) {
-               LOG_ERROR
-                   ("jtag status contains invalid mode value - communication failure");
+               LOG_ERROR("jtag status contains invalid mode value - communication failure");
                return ERROR_TARGET_FAILURE;
        }
 
@@ -326,23 +385,17 @@ static int stm32_stlink_poll(struct target *target)
                return ERROR_OK;
 
        if (state == TARGET_HALTED) {
-               target_call_event_callbacks(target, TARGET_EVENT_DEBUG_HALTED);
                target->state = state;
 
-               stm32_stlink_load_context(target);
+               stlink_debug_entry(target);
 
-               LOG_INFO("halted: PC: 0x%x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
+               target_call_event_callbacks(target, TARGET_EVENT_HALTED);
+               LOG_DEBUG("halted: PC: 0x%x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
        }
 
        return ERROR_OK;
 }
 
-static int stm32_stlink_arch_state(struct target *target)
-{
-       LOG_DEBUG("%s", __func__);
-       return ERROR_OK;
-}
-
 static int stm32_stlink_assert_reset(struct target *target)
 {
        int res;
@@ -364,9 +417,12 @@ static int stm32_stlink_assert_reset(struct target *target)
        /* registers are now invalid */
        register_cache_invalidate(armv7m->core_cache);
 
-       stm32_stlink_load_context(target);
-
-       target->state = TARGET_HALTED;
+       if (target->reset_halt) {
+               target->state = TARGET_RESET;
+               target->debug_reason = DBG_REASON_DBGRQ;
+       } else {
+               target->state = TARGET_HALTED;
+       }
 
        return ERROR_OK;
 }
@@ -489,7 +545,7 @@ static int stm32_stlink_resume(struct target *target, int current,
 
        target->state = TARGET_RUNNING;
 
-       target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
+       target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
 
        return ERROR_OK;
 }
@@ -511,7 +567,6 @@ static int stm32_stlink_step(struct target *target, int current,
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       pc = armv7m->arm.pc;
        if (!current) {
                buf_set_u32(pc->value, 0, 32, address);
                pc->dirty = true;
@@ -549,7 +604,7 @@ static int stm32_stlink_step(struct target *target, int current,
        target->debug_reason = DBG_REASON_SINGLESTEP;
        target_call_event_callbacks(target, TARGET_EVENT_HALTED);
 
-       stm32_stlink_load_context(target);
+       stlink_debug_entry(target);
 
        LOG_INFO("halted: PC: 0x%x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
 
@@ -561,31 +616,46 @@ static int stm32_stlink_read_memory(struct target *target, uint32_t address,
                                    uint8_t *buffer)
 {
        int res;
-       uint32_t *dst = (uint32_t *) buffer;
+       uint32_t buffer_threshold = 128;
+       uint32_t addr_increment = 4;
+       uint8_t *dst = buffer;
        uint32_t c;
        struct stlink_interface_s *stlink_if = target_to_stlink(target);
 
        if (!count || !buffer)
-               return ERROR_INVALID_ARGUMENTS;
+               return ERROR_COMMAND_SYNTAX_ERROR;
+
+       LOG_DEBUG("%s %x %d %d", __func__, address, size, count);
+
+       /* prepare byte count, buffer threshold
+        * and address increment for none 32bit access
+        */
        if (size != 4) {
-               LOG_DEBUG("%s %x %d %d", __func__, address, size, count);
-               return ERROR_INVALID_ARGUMENTS;
+               count *= size;
+               buffer_threshold = 64;
+               addr_increment = 1;
        }
 
        while (count) {
-               if (count > 128)
-                       c = 128;
+               if (count > buffer_threshold)
+                       c = buffer_threshold;
                else
                        c = count;
 
-               res =
-                   stlink_if->layout->api->read_mem32(stlink_if->fd, address,
+               if (size != 4)
+                       res =
+                               stlink_if->layout->api->read_mem8(stlink_if->fd, address,
                                                       c, dst);
+               else
+                       res =
+                               stlink_if->layout->api->read_mem32(stlink_if->fd, address,
+                                                      c, (uint32_t *)dst);
 
                if (res != ERROR_OK)
                        return res;
-               dst += c;
-               address += (c * 4);
+
+               address += (c * addr_increment);
+               dst += (c * addr_increment);
                count -= c;
        }
 
@@ -597,31 +667,46 @@ static int stm32_stlink_write_memory(struct target *target, uint32_t address,
                                     const uint8_t *buffer)
 {
        int res;
-       uint32_t *dst = (uint32_t *) buffer;
+       uint32_t buffer_threshold = 128;
+       uint32_t addr_increment = 4;
+       const uint8_t *dst = buffer;
        uint32_t c;
        struct stlink_interface_s *stlink_if = target_to_stlink(target);
 
        if (!count || !buffer)
-               return ERROR_INVALID_ARGUMENTS;
+               return ERROR_COMMAND_SYNTAX_ERROR;
+
+       LOG_DEBUG("%s %x %d %d", __func__, address, size, count);
+
+       /* prepare byte count, buffer threshold
+        * and address increment for none 32bit access
+        */
        if (size != 4) {
-               LOG_DEBUG("%s %x %d %d", __func__, address, size, count);
-               return ERROR_INVALID_ARGUMENTS;
+               count *= size;
+               buffer_threshold = 64;
+               addr_increment = 1;
        }
 
        while (count) {
-               if (count > 128)
-                       c = 128;
+               if (count > buffer_threshold)
+                       c = buffer_threshold;
                else
                        c = count;
 
-               res =
-                   stlink_if->layout->api->write_mem32(stlink_if->fd, address,
-                                                       c, dst);
+               if (size != 4)
+                       res =
+                               stlink_if->layout->api->write_mem8(stlink_if->fd, address,
+                                                      c, dst);
+               else
+                       res =
+                               stlink_if->layout->api->write_mem32(stlink_if->fd, address,
+                                                      c, (uint32_t *)dst);
 
                if (res != ERROR_OK)
                        return res;
-               dst += c;
-               address += (c * 4);
+
+               address += (c * addr_increment);
+               dst += (c * addr_increment);
                count -= c;
        }
 
@@ -643,7 +728,7 @@ struct target_type stm32_stlink_target = {
        .examine = stm32_stlink_examine,
 
        .poll = stm32_stlink_poll,
-       .arch_state = stm32_stlink_arch_state,
+       .arch_state = armv7m_arch_state,
 
        .assert_reset = stm32_stlink_assert_reset,
        .deassert_reset = stm32_stlink_deassert_reset,
@@ -658,6 +743,8 @@ struct target_type stm32_stlink_target = {
        .read_memory = stm32_stlink_read_memory,
        .write_memory = stm32_stlink_write_memory,
        .bulk_write_memory = stm32_stlink_bulk_write_memory,
+       .checksum_memory = armv7m_checksum_memory,
+       .blank_check_memory = armv7m_blank_check_memory,
 
        .run_algorithm = armv7m_run_algorithm,
        .start_algorithm = armv7m_start_algorithm,
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