stlink: fix typo

[openocd.git] / src / target / stm32_stlink.c

diff --git a/src/target/stm32_stlink.c b/src/target/stm32_stlink.c
index c9ab81068f7bbea69535286610c5010be287eb34..aac1eecb7d70843fa64759b293fb51fa1b9490a7 100644 (file)
--- a/src/target/stm32_stlink.c
+++ b/src/target/stm32_stlink.c
@@ -111,6 +111,8 @@ static int stm32_stlink_load_core_reg_u32(struct target *target,
                 * it was removed from r1 docs, but still works.
                 */
                retval = stlink_if->layout->api->read_reg(stlink_if->fd, 20, value);
+               if (retval != ERROR_OK)
+                       return retval;
 
                switch (num) {
                case ARMV7M_PRIMASK:
@@ -278,6 +280,7 @@ static int stm32_stlink_init_arch_info(struct target *target,
        armv7m->store_core_reg_u32 = stm32_stlink_store_core_reg_u32;
 
        armv7m->examine_debug_reason = stm32_stlink_examine_debug_reason;
+       armv7m->stlink = true;
 
        return ERROR_OK;
 }
@@ -406,22 +409,49 @@ static int stm32_stlink_poll(struct target *target)
 
 static int stm32_stlink_assert_reset(struct target *target)
 {
-       int res;
+       int res = ERROR_OK;
        struct stlink_interface_s *stlink_if = target_to_stlink(target);
        struct armv7m_common *armv7m = target_to_armv7m(target);
+       bool use_srst_fallback = true;
 
        LOG_DEBUG("%s", __func__);
 
+       enum reset_types jtag_reset_config = jtag_get_reset_config();
+
+       bool srst_asserted = false;
+
+       if (jtag_reset_config & RESET_SRST_NO_GATING) {
+               jtag_add_reset(0, 1);
+               res = stlink_if->layout->api->assert_srst(stlink_if->fd, 0);
+               srst_asserted = true;
+       }
+
+       stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DHCSR, DBGKEY|C_DEBUGEN);
+       stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DEMCR, VC_CORERESET);
+
+       if (jtag_reset_config & RESET_HAS_SRST) {
+               if (!srst_asserted) {
+                       jtag_add_reset(0, 1);
+                       res = stlink_if->layout->api->assert_srst(stlink_if->fd, 0);
+               }
+               if (res == ERROR_COMMAND_NOTFOUND)
+                       LOG_ERROR("Hardware srst not supported, falling back to software reset");
+               else if (res == ERROR_OK) {
+                       /* hardware srst supported */
+                       use_srst_fallback = false;
+               }
+       }
+
+       if (use_srst_fallback) {
+               /* stlink v1 api does not support hardware srst, so we use a software reset fallback */
+               stlink_if->layout->api->write_debug_reg(stlink_if->fd, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ);
+       }
+
        res = stlink_if->layout->api->reset(stlink_if->fd);
 
        if (res != ERROR_OK)
                return res;
 
-       /* virtual assert reset, we need it for the internal
-        * jtag state machine
-        */
-       jtag_add_reset(1, 1);
-
        /* registers are now invalid */
        register_cache_invalidate(armv7m->core_cache);
 
@@ -438,9 +468,15 @@ static int stm32_stlink_assert_reset(struct target *target)
 static int stm32_stlink_deassert_reset(struct target *target)
 {
        int res;
+       struct stlink_interface_s *stlink_if = target_to_stlink(target);
+
+       enum reset_types jtag_reset_config = jtag_get_reset_config();
 
        LOG_DEBUG("%s", __func__);
 
+       if (jtag_reset_config & RESET_HAS_SRST)
+               stlink_if->layout->api->assert_srst(stlink_if->fd, 1);
+
        /* virtual deassert reset, we need it for the internal
         * jtag state machine
         */
@@ -550,6 +586,7 @@ static int stm32_stlink_resume(struct target *target, int current,
                return res;
 
        target->state = TARGET_RUNNING;
+       target->debug_reason = DBG_REASON_NOTHALTED;
 
        target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
 
@@ -718,12 +755,20 @@ static int stm32_stlink_bulk_write_memory(struct target *target,
        return stm32_stlink_write_memory(target, address, 4, count, buffer);
 }
 
+static const struct command_registration stm32_stlink_command_handlers[] = {
+       {
+               .chain = arm_command_handlers,
+       },
+       COMMAND_REGISTRATION_DONE
+};
+
 struct target_type stm32_stlink_target = {
        .name = "stm32_stlink",
 
        .init_target = stm32_stlink_init_target,
        .target_create = stm32_stlink_target_create,
        .examine = cortex_m3_examine,
+       .commands = stm32_stlink_command_handlers,
 
        .poll = stm32_stlink_poll,
        .arch_state = armv7m_arch_state,