LOG_DEBUG("load from core reg %i value 0x%" PRIx32 "", (int)num, *value);
break;
- case 33:
- case 64 ... 96:
+ case ARMV7M_FPSID:
+ case ARMV7M_FPEXC:
+ *value = 0;
+ break;
+
+ case ARMV7M_FPSCR:
/* Floating-point Status and Registers */
- retval = target_write_u32(target, ARMV7M_SCS_DCRSR, num);
+ retval = target_write_u32(target, ARMV7M_SCS_DCRSR, 33);
if (retval != ERROR_OK)
return retval;
retval = target_read_u32(target, ARMV7M_SCS_DCRDR, value);
LOG_DEBUG("load from core reg %i value 0x%" PRIx32 "", (int)num, *value);
break;
+ case ARMV7M_S0 ... ARMV7M_S31:
+ /* Floating-point Status and Registers */
+ retval = target_write_u32(target, ARMV7M_SCS_DCRSR, num-ARMV7M_S0+64);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_read_u32(target, ARMV7M_SCS_DCRDR, value);
+ if (retval != ERROR_OK)
+ return retval;
+ LOG_DEBUG("load from core reg %i value 0x%" PRIx32 "", (int)num, *value);
+ break;
+
+ case ARMV7M_D0 ... ARMV7M_D15:
+ value = 0;
+ break;
+
case ARMV7M_PRIMASK:
case ARMV7M_BASEPRI:
case ARMV7M_FAULTMASK:
LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num, value);
break;
- case 33:
- case 64 ... 96:
+ case ARMV7M_FPSID:
+ case ARMV7M_FPEXC:
+ break;
+
+ case ARMV7M_FPSCR:
/* Floating-point Status and Registers */
retval = target_write_u32(target, ARMV7M_SCS_DCRDR, value);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, ARMV7M_SCS_DCRSR, num | (1<<16));
+ retval = target_write_u32(target, ARMV7M_SCS_DCRSR, 33 | (1<<16));
if (retval != ERROR_OK)
return retval;
LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num, value);
break;
+ case ARMV7M_S0 ... ARMV7M_S31:
+ /* Floating-point Status and Registers */
+ retval = target_write_u32(target, ARMV7M_SCS_DCRDR, value);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target, ARMV7M_SCS_DCRSR, (num-ARMV7M_S0+64) | (1<<16));
+ if (retval != ERROR_OK)
+ return retval;
+ LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num, value);
+ break;
+
+ case ARMV7M_D0 ... ARMV7M_D15:
+ break;
+
case ARMV7M_PRIMASK:
case ARMV7M_BASEPRI:
case ARMV7M_FAULTMASK:
armv7m->exception_number = 0;
}
- LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s",
+ LOG_DEBUG("entered debug state in core mode: %s at PC 0x%08" PRIx32 ", target->state: %s",
armv7m_mode_strings[armv7m->core_mode],
*(uint32_t *)(arm->pc->value),
target_state_name(target));
return retval;
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
- LOG_DEBUG("halted: PC: 0x%x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
+ LOG_DEBUG("halted: PC: 0x%08x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
}
return ERROR_OK;
struct breakpoint *breakpoint = NULL;
struct reg *pc;
- LOG_DEBUG("%s %d %x %d %d", __func__, current, address,
+ LOG_DEBUG("%s %d 0x%08x %d %d", __func__, current, address,
handle_breakpoints, debug_execution);
if (target->state != TARGET_HALTED) {
stlink_debug_entry(target);
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
- LOG_INFO("halted: PC: 0x%x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
+ LOG_INFO("halted: PC: 0x%08x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
return ERROR_OK;
}
int res;
uint32_t buffer_threshold = 128;
uint32_t addr_increment = 4;
- uint8_t *dst = buffer;
uint32_t c;
struct stlink_interface_s *stlink_if = target_to_stlink(target);
if (!count || !buffer)
return ERROR_COMMAND_SYNTAX_ERROR;
- LOG_DEBUG("%s %x %d %d", __func__, address, size, count);
+ LOG_DEBUG("%s 0x%08x %d %d", __func__, address, size, count);
/* prepare byte count, buffer threshold
* and address increment for none 32bit access
if (size != 4)
res = stlink_if->layout->api->read_mem8(stlink_if->fd,
- address, c, dst);
+ address, c, buffer);
else
res = stlink_if->layout->api->read_mem32(stlink_if->fd,
- address, c, (uint32_t *)dst);
+ address, c, buffer);
if (res != ERROR_OK)
return res;
address += (c * addr_increment);
- dst += (c * addr_increment);
+ buffer += (c * addr_increment);
count -= c;
}
int res;
uint32_t buffer_threshold = 128;
uint32_t addr_increment = 4;
- const uint8_t *dst = buffer;
uint32_t c;
struct stlink_interface_s *stlink_if = target_to_stlink(target);
if (!count || !buffer)
return ERROR_COMMAND_SYNTAX_ERROR;
- LOG_DEBUG("%s %x %d %d", __func__, address, size, count);
+ LOG_DEBUG("%s 0x%08x %d %d", __func__, address, size, count);
/* prepare byte count, buffer threshold
* and address increment for none 32bit access
if (size != 4)
res = stlink_if->layout->api->write_mem8(stlink_if->fd,
- address, c, dst);
+ address, c, buffer);
else
res = stlink_if->layout->api->write_mem32(stlink_if->fd,
- address, c, (uint32_t *)dst);
+ address, c, buffer);
if (res != ERROR_OK)
return res;
address += (c * addr_increment);
- dst += (c * addr_increment);
+ buffer += (c * addr_increment);
count -= c;
}