coding style: fix space separation

[openocd.git] / src / target / stm8.c

diff --git a/src/target/stm8.c b/src/target/stm8.c
index ad05b54f9b24bbc72a54af9e87938d607f771678..ee3bb31a9f597b8f2e86a5bf264b9e261a94db7d 100644 (file)
--- a/src/target/stm8.c
+++ b/src/target/stm8.c
@@ -45,6 +45,8 @@ static int stm8_set_breakpoint(struct target *target,
 static void stm8_enable_watchpoints(struct target *target);
 static int stm8_unset_watchpoint(struct target *target,
                struct watchpoint *watchpoint);
+static int (*adapter_speed)(int speed);
+extern struct adapter_driver *adapter_driver;
 
 static const struct {
        unsigned id;
@@ -797,8 +799,35 @@ static int stm8_read_memory(struct target *target, target_addr_t address,
        return retval;
 }
 
+static int stm8_speed(int speed)
+{
+       int retval;
+       uint8_t csr;
+
+       LOG_DEBUG("stm8_speed: %d", speed);
+
+       csr = SAFE_MASK | SWIM_DM;
+       if (speed >= SWIM_FREQ_HIGH)
+               csr |= HS;
+
+       LOG_DEBUG("writing B0 to SWIM_CSR (SAFE_MASK + SWIM_DM + HS:%d)", csr & HS ? 1 : 0);
+       retval = stm8_write_u8(NULL, SWIM_CSR, csr);
+       if (retval != ERROR_OK)
+               return retval;
+       return adapter_speed(speed);
+}
+
 static int stm8_init(struct command_context *cmd_ctx, struct target *target)
 {
+       /*
+        * FIXME: this is a temporarily hack that needs better implementation.
+        * Being the only overwrite of adapter_driver, it prevents declaring const
+        * the struct adapter_driver.
+        * intercept adapter_driver->speed() calls
+        */
+       adapter_speed = adapter_driver->speed;
+       adapter_driver->speed = stm8_speed;
+
        stm8_build_reg_cache(target);
 
        return ERROR_OK;
@@ -1114,7 +1143,7 @@ static int stm8_read_core_reg(struct target *target, unsigned int num)
                return ERROR_COMMAND_SYNTAX_ERROR;
 
        reg_value = stm8->core_regs[num];
-       LOG_DEBUG("read core reg %i value 0x%" PRIx32 "", num , reg_value);
+       LOG_DEBUG("read core reg %i value 0x%" PRIx32 "", num, reg_value);
        buf_set_u32(stm8->core_cache->reg_list[num].value, 0, 32, reg_value);
        stm8->core_cache->reg_list[num].valid = true;
        stm8->core_cache->reg_list[num].dirty = false;
@@ -1134,7 +1163,7 @@ static int stm8_write_core_reg(struct target *target, unsigned int num)
 
        reg_value = buf_get_u32(stm8->core_cache->reg_list[num].value, 0, 32);
        stm8->core_regs[num] = reg_value;
-       LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value);
+       LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, reg_value);
        stm8->core_cache->reg_list[num].valid = true;
        stm8->core_cache->reg_list[num].dirty = false;
 
@@ -1660,17 +1689,6 @@ static int stm8_examine(struct target *target)
 
        if (!target_was_examined(target)) {
                if (!stm8->swim_configured) {
-                       /* set SWIM_CSR = 0xa0 (enable mem access & mask reset) */
-                       LOG_DEBUG("writing A0 to SWIM_CSR (SAFE_MASK + SWIM_DM)");
-                       retval = stm8_write_u8(target, SWIM_CSR, SAFE_MASK + SWIM_DM);
-                       if (retval != ERROR_OK)
-                               return retval;
-                       /* set high speed */
-                       LOG_DEBUG("writing B0 to SWIM_CSR (SAFE_MASK + SWIM_DM + HS)");
-                       retval = stm8_write_u8(target, SWIM_CSR, SAFE_MASK + SWIM_DM + HS);
-                       if (retval != ERROR_OK)
-                               return retval;
-                       jtag_config_khz(1);
                        stm8->swim_configured = true;
                        /*
                                Now is the time to deassert reset if connect_under_reset.