extern struct target_type feroceon_target;
extern struct target_type dragonite_target;
extern struct target_type xscale_target;
+extern struct target_type xtensa_chip_target;
extern struct target_type cortexm_target;
extern struct target_type cortexa_target;
extern struct target_type aarch64_target;
&feroceon_target,
&dragonite_target,
&xscale_target,
+ &xtensa_chip_target,
&cortexm_target,
&cortexa_target,
&cortexr4_target,
* Disable polling during resume() to guarantee the execution of handlers
* in the correct order.
*/
- bool save_poll = jtag_poll_get_enabled();
- jtag_poll_set_enabled(false);
+ bool save_poll_mask = jtag_poll_mask();
retval = target->type->resume(target, current, address, handle_breakpoints, debug_execution);
- jtag_poll_set_enabled(save_poll);
+ jtag_poll_unmask(save_poll_mask);
+
if (retval != ERROR_OK)
return retval;
* more predictable, i.e. dr/irscan & pathmove in events will
* not have JTAG operations injected into the middle of a sequence.
*/
- bool save_poll = jtag_poll_get_enabled();
-
- jtag_poll_set_enabled(false);
+ bool save_poll_mask = jtag_poll_mask();
sprintf(buf, "ocd_process_reset %s", n->name);
retval = Jim_Eval(cmd->ctx->interp, buf);
- jtag_poll_set_enabled(save_poll);
+ jtag_poll_unmask(save_poll_mask);
if (retval != JIM_OK) {
Jim_MakeErrorMessage(cmd->ctx->interp);
struct working_area *new_wa = malloc(sizeof(*new_wa));
if (new_wa) {
new_wa->next = NULL;
- new_wa->size = target->working_area_size & ~3UL; /* 4-byte align */
+ new_wa->size = ALIGN_DOWN(target->working_area_size, 4); /* 4-byte align */
new_wa->address = target->working_area;
new_wa->backup = NULL;
new_wa->user = NULL;
}
/* only allocate multiples of 4 byte */
- if (size % 4)
- size = (size + 3) & (~3UL);
+ size = ALIGN_UP(size, 4);
struct working_area *c = target->working_areas;
uint32_t max_size = 0;
if (!c)
- return target->working_area_size;
+ return ALIGN_DOWN(target->working_area_size, 4);
while (c) {
if (c->free && max_size < c->size)