jtag newtap change & huge manual update

[openocd.git] / src / target / target / aduc702x.cfg

diff --git a/src/target/target/aduc702x.cfg b/src/target/target/aduc702x.cfg
index 4269f38aa5beb47277a5c64891b75d175a13be16..35f5ff3232a45da4be14fb2eb9a62ef28dc16a6f 100644 (file)
--- a/src/target/target/aduc702x.cfg
+++ b/src/target/target/aduc702x.cfg
@@ -1,38 +1,57 @@
-## -*- tcl -*-\r
-##\r
-\r
-# This is for the case that TRST/SRST is not wired on your JTAG adaptor.\r
-# Don't really need them anyways.  \r
-reset_config none\r
-\r
-## JTAG scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-##\r
-## Target configuration\r
-##\r
-target arm7tdmi little 0\r
-\r
-## software initiated reset (if your SRST isn't wired)\r
-#proc target_0_reset {} { mwb 0x0ffff0230 04 }\r
-\r
-# use top 1k of SRAM for as temporary JTAG memory \r
-#working_area 0 0x11C00 0x400 backup\r
-\r
-## flash configuration\r
-## AdUC702x not yet spported  :(\r
-\r
-## If you use the watchdog, the following code makes sure that the board\r
-## doesn't reboot when halted via JTAG.  Yes, on the older generation\r
-## AdUC702x, timer3 continues running even when the CPU is halted.\r
-\r
-proc watchdog_service {} {\r
-    global watchdog_hdl\r
-    mww 0xffff036c 0\r
-#    puts "watchdog!!"\r
-    set watchdog_hdl [after 500 watchdog_service]\r
-}\r
-\r
-proc target_0_post_halt {} { watchdog_service }\r
-proc arget_0_pre_resume {} { global watchdog_hdl; after cancel $watchdog_hdl }\r
+## -*- tcl -*-
+##
+
+
+if { [info exists CHIPNAME] } {        
+   set  _CHIPNAME $CHIPNAME    
+} else {        
+   set  _CHIPNAME s3c2410
+}
+
+if { [info exists ENDIAN] } {  
+   set  _ENDIAN $ENDIAN    
+} else {        
+  # This config file was defaulting to big endian..
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {        
+   set  _CPUTAPID $CPUTAPID    
+} else {        
+   set  _CPUTAPID 0xffffffff
+}
+
+
+jtag_nsrst_delay 200
+jtag_ntrst_delay 200
+
+# This is for the case that TRST/SRST is not wired on your JTAG adaptor.
+# Don't really need them anyways.  
+reset_config none
+
+## JTAG scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+##
+## Target configuration
+##
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
+
+## flash configuration
+flash bank aduc702x 0x80000 0x10000 2 2 0
+
+## If you use the watchdog, the following code makes sure that the board
+## doesn't reboot when halted via JTAG.  Yes, on the older generation
+## AdUC702x, timer3 continues running even when the CPU is halted.
+
+proc watchdog_service {} {
+    global watchdog_hdl
+    mww 0xffff036c 0
+#    puts "watchdog!!"
+    set watchdog_hdl [after 500 watchdog_service]
+}
+
+$_TARGETNAME configure -event reset-halt-post {  watchdog_service }
+$_TARGETNAME configure -event old-pre_resume { global watchdog_hdl; after cancel $watchdog_hdl }