jtag newtap change & huge manual update
[openocd.git] / src / target / target / aduc702x.cfg
index e3e886202b75f7f3b99cf54fdaa4ccb76b545831..35f5ff3232a45da4be14fb2eb9a62ef28dc16a6f 100644 (file)
@@ -1,6 +1,27 @@
 ## -*- tcl -*-
 ##
 
+
+if { [info exists CHIPNAME] } {        
+   set  _CHIPNAME $CHIPNAME    
+} else {        
+   set  _CHIPNAME s3c2410
+}
+
+if { [info exists ENDIAN] } {  
+   set  _ENDIAN $ENDIAN    
+} else {        
+  # This config file was defaulting to big endian..
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {        
+   set  _CPUTAPID $CPUTAPID    
+} else {        
+   set  _CPUTAPID 0xffffffff
+}
+
+
 jtag_nsrst_delay 200
 jtag_ntrst_delay 200
 
@@ -10,21 +31,16 @@ reset_config none
 
 ## JTAG scan chain
 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 ##
 ## Target configuration
 ##
-target arm7tdmi little 0
-
-## software initiated reset (if your SRST isn't wired)
-#proc target_0_reset {} { mwb 0x0ffff0230 04 }
-
-# use top 1k of SRAM for as temporary JTAG memory 
-#working_area 0 0x11C00 0x400 backup
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
 ## flash configuration
-flash bank x7026 0x80000 0x10000 2 2 0
+flash bank aduc702x 0x80000 0x10000 2 2 0
 
 ## If you use the watchdog, the following code makes sure that the board
 ## doesn't reboot when halted via JTAG.  Yes, on the older generation
@@ -37,5 +53,5 @@ proc watchdog_service {} {
     set watchdog_hdl [after 500 watchdog_service]
 }
 
-[new_target_name] configure -event reset-halt-post {  watchdog_service }
-[new_target_name] configure -event old-pre_resume { global watchdog_hdl; after cancel $watchdog_hdl }
+$_TARGETNAME configure -event reset-halt-post {  watchdog_service }
+$_TARGETNAME configure -event old-pre_resume { global watchdog_hdl; after cancel $watchdog_hdl }

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