-#STR750 CPU\r
-\r
-#use combined on interfaces or targets that can\92t set TRST/SRST separately\r
-#reset_config trst_and_srst srst_pulls_trst\r
-reset_config trst_and_srst srst_pulls_trst\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#jtag nTRST and nSRST delay\r
-jtag_nsrst_delay 500\r
-jtag_ntrst_delay 500\r
-\r
-#target configuration\r
-daemon_startup reset\r
-\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target arm7tdmi little run_and_halt 0 arm7tdmi\r
-\r
-run_and_halt_time 0 30\r
-\r
-working_area 0 0x40000000 0x4000 nobackup\r
-\r
-#flash bank <driver> <base> <size> <chip_width> <bus_width>\r
-flash bank str7x 0x20000000 0x00040000 0 0 0 STR75x\r
-flash bank str7x 0x200C0000 0x00004000 0 0 0 STR75x\r
-\r
+#STR750 CPU
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME str750
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0xffffffff
+}
+
+# jtag speed
+jtag_khz 10
+
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+#reset_config trst_and_srst srst_pulls_trst
+reset_config trst_and_srst srst_pulls_trst
+
+#jtag scan chain
+
+tag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
+
+#jtag nTRST and nSRST delay
+jtag_nsrst_delay 500
+jtag_ntrst_delay 500
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+
+$_TARGETNAME configure -event reset-start { jtag_khz 10 }
+$_TARGETNAME configure -event reset-init { jtag_khz 3000 }
+$_TARGETNAME configure -event gdb-flash-erase-start {
+ flash protect 0 0 7 off
+ flash protect 1 0 1 off
+}
+
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+flash bank str7x 0x20000000 0x00040000 0 0 0 STR75x
+flash bank str7x 0x200C0000 0x00004000 0 0 0 STR75x
+