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STR912 uses RCLK if available
[openocd.git] / src / target / target / str912.cfg
diff --git a/src/target/target/str912.cfg b/src/target/target/str912.cfg
index c583a4d641d88d853446292beafca0973d7c9ca6..ca2fb8ca4038528e60c2e76a92a1d70bc5b0df45 100644 (file)
--- a/src/target/target/str912.cfg
+++ b/src/target/target/str912.cfg
@@ -2,14 +2,14 @@
 
 # jtag speed. We need to stick to 16kHz until we've finished reset.
 
-jtag_khz 16
+jtag_rclk 16
 proc target_0_pre_reset {} {
-       jtag_khz 16
+       jtag_rclk 16
 }
 
 proc target_0_post_reset {} {
        # We can increase speed now that we know the target is halted.
-       jtag_khz 3000
+       jtag_rclk 3000
        
        # -- Enable 96K RAM
        # PFQBC enabled / DTCM & AHB wait-states disabled
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