}
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID
+################
+
+# various symbol definitions, to avoid hard-wiring addresses
+# and enable some sharing of DaVinci-family utility code
+global dm355
+set dm355 [ dict create ]
+
+# Physical addresses for controllers and memory
+# (Some of these are valid for many DaVinci family chips)
+dict set dm355 sram0 0x00010000
+dict set dm355 sram1 0x00014000
+dict set dm355 sysbase 0x01c40000
+dict set dm355 pllc1 0x01c40800
+dict set dm355 pllc2 0x01c40c00
+dict set dm355 psc 0x01c41000
+dict set dm355 gpio 0x01c67000
+dict set dm355 a_emif 0x01e10000
+dict set dm355 a_emif_cs0 0x02000000
+dict set dm355 a_emif_cs1 0x04000000
+dict set dm355 ddr_emif 0x20000000
+dict set dm355 ddr 0x80000000
+
+source [find target/davinci.cfg]
+
+################
# GDB target: the ARM, using SRAM1 for scratch. SRAM0 (also 16K)
# and the ETB memory (4K) are other options, while trace is unused.
set _TARGETNAME $_CHIPNAME.arm
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00014000 -work-area-size 0x4000 -work-area-backup 0
+
+# NOTE that work-area-virt presumes a Linux 2.6.30-rc2+ kernel,
+# and that the work area is used only with a kernel mmu context ...
+$_TARGETNAME configure \
+ -work-area-virt [expr 0xfffe0000 + 0x4000] \
+ -work-area-phys [dict get $dm355 sram1] \
+ -work-area-size 0x4000 \
+ -work-area-backup 0
arm7_9 dbgrq enable
arm7_9 fast_memory_access enable