/* examine results */
for (i = words_done; i < num_words; i++)
{
- if (!(field0[0] & 1))
+ if (!(field0[i] & 1))
{
/* move backwards if necessary */
int j;
}
/* send count elements of size byte to the debug handler */
-static int xscale_send(struct target *target, uint8_t *buffer, int count, int size)
+static int xscale_send(struct target *target, const uint8_t *buffer, int count, int size)
{
struct xscale_common *xscale = target_to_xscale(target);
uint32_t t[3];
{
struct xscale_common *xscale = target_to_xscale(target);
struct arm *armv4_5 = &xscale->armv4_5_common;
- struct breakpoint *breakpoint = target->breakpoints;
uint32_t current_pc;
int retval;
int i;
/* the front-end may request us not to handle breakpoints */
if (handle_breakpoints)
{
+ struct breakpoint *breakpoint;
breakpoint = breakpoint_find(target,
buf_get_u32(armv4_5->pc->value, 0, 32));
if (breakpoint != NULL)
/* restore banked registers */
retval = xscale_restore_banked(target);
+ if (retval != ERROR_OK)
+ return retval;
/* send resume request */
xscale_send_u32(target, 0x30);
/* restore banked registers */
retval = xscale_restore_banked(target);
+ if (retval != ERROR_OK)
+ return retval;
/* send resume request (command 0x30 or 0x31)
* clean the trace buffer if it is to be enabled (0x62) */
if ((retval = arm_simulate_step(target, NULL)) != ERROR_OK)
return retval;
current_pc = buf_get_u32(armv4_5->pc->value, 0, 32);
+ LOG_DEBUG("current pc %" PRIx32, current_pc);
target->debug_reason = DBG_REASON_SINGLESTEP;
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
}
retval = xscale_step_inner(target, current, address, handle_breakpoints);
+ if (retval != ERROR_OK)
+ return retval;
if (breakpoint)
{
}
static int xscale_write_memory(struct target *target, uint32_t address,
- uint32_t size, uint32_t count, uint8_t *buffer)
+ uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
int retval;
}
static int xscale_write_phys_memory(struct target *target, uint32_t address,
- uint32_t size, uint32_t count, uint8_t *buffer)
+ uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct xscale_common *xscale = target_to_xscale(target);
/* with MMU inactive, there are only physical addresses */
if (!xscale->armv4_5_mmu.mmu_enabled)
- return xscale_read_memory(target, address, size, count, buffer);
+ return xscale_write_memory(target, address, size, count, buffer);
/** \todo: provide a non-stub implementation of this routine. */
LOG_ERROR("%s: %s is not implemented. Disable MMU?",
}
static int xscale_bulk_write_memory(struct target *target, uint32_t address,
- uint32_t count, uint8_t *buffer)
+ uint32_t count, const uint8_t *buffer)
{
return xscale_write_memory(target, address, 4, count, buffer);
}
pc - xscale->trace.image->sections[section].base_address,
4, buf, &size_read)) != ERROR_OK)
{
- LOG_ERROR("error while reading instruction: %i", retval);
+ LOG_ERROR("error while reading instruction");
return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
}
opcode = target_buffer_get_u32(target, buf);
pc - xscale->trace.image->sections[section].base_address,
2, buf, &size_read)) != ERROR_OK)
{
- LOG_ERROR("error while reading instruction: %i", retval);
+ LOG_ERROR("error while reading instruction");
return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
}
opcode = target_buffer_get_u16(target, buf);