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topic: Support for the Xilinx BSCAN_* Virtual JTAG in Openrisc
[openocd.git] / tcl / board / or1k_generic.cfg
diff --git a/tcl/board/or1k_generic.cfg b/tcl/board/or1k_generic.cfg
index 9daa7abd53da4a095c0300deb33afeba3cb94924..e7588f9e03b0b7092429bfcb3fc83a0c9b7bd3d7 100644 (file)
--- a/tcl/board/or1k_generic.cfg
+++ b/tcl/board/or1k_generic.cfg
@@ -1,6 +1,9 @@
-# If you want to use the VJTAG TAP, you must set your FPGA TAP ID here
+# If you want to use the VJTAG TAP or the XILINX BSCAN,
+# you must set your FPGA TAP ID here
+
 set FPGATAPID 0x020b30dd
-# Choose your TAP core (VJTAG or MOHOR)
+
+# Choose your TAP core (VJTAG , MOHOR or XILINX_BSCAN)
 set TAP_TYPE VJTAG
 # Set your chip name
 set CHIPNAME or1200
Open On-Chip Debugger

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