Remove jtag_rclk from target configs

[openocd.git] / tcl / target / altera_fpgasoc.cfg

diff --git a/tcl/target/altera_fpgasoc.cfg b/tcl/target/altera_fpgasoc.cfg
index 9c7b4196e34b1dfb68f27012530afa3a6e046a2b..e876031c9692267709a3980af1453136966677c7 100644 (file)
--- a/tcl/target/altera_fpgasoc.cfg
+++ b/tcl/target/altera_fpgasoc.cfg
@@ -36,7 +36,7 @@ jtag newtap $_CHIPNAME.fpga tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-
 # core 1  -  0x80112000
 
 # Slow speed to be sure it will work
-jtag_rclk 1000
+adapter_khz 1000
 
 set _TARGETNAME1 $_CHIPNAME.cpu.0
 set _TARGETNAME2 $_CHIPNAME.cpu.1
@@ -45,7 +45,7 @@ set _TARGETNAME2 $_CHIPNAME.cpu.1
 target create $_TARGETNAME1 cortex_a -chain-position $_CHIPNAME.dap \
         -coreid 0 -dbgbase 0x80110000
 
-$_TARGETNAME1 configure -event reset-start { jtag_rclk 1000 }
+$_TARGETNAME1 configure -event reset-start { adapter_khz 1000 }
 $_TARGETNAME1 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME1"
 $_TARGETNAME1 configure -event gdb-attach { halt }
 
@@ -54,7 +54,7 @@ $_TARGETNAME1 configure -event gdb-attach { halt }
 #target create $_TARGETNAME2 cortex_a -chain-position $_CHIPNAME.dap \
 #        -coreid 1 -dbgbase 0x80112000
 
-#$_TARGETNAME2 configure -event reset-start { jtag_rclk 1000 }
+#$_TARGETNAME2 configure -event reset-start { adapter_khz 1000 }
 #$_TARGETNAME2 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME2"
 #$_TARGETNAME2 configure -event gdb-attach { halt }