puts "22) flashUBOOT: will prgram NOR sectors 0-3 with u-boot.bin"
}
-# mrw,mmw from davinci.cfg
-# mrw: "memory read word", returns value of $reg
-proc mrw {reg} {
- set value ""
- ocd_mem2array value 32 $reg 1
- return $value(0)
-}
+source [find mem_helper.tcl]
# read a 64-bit register (memory mapped)
proc mr64bit {reg} {
set value ""
- ocd_mem2array value 32 $reg 2
+ mem2array value 32 $reg 2
return $value
}
mww [expr $reg+4] $high
}
-# mmw: "memory modify word", updates value of $reg
-# $reg <== ((value & ~$clearbits) | $setbits)
-proc mmw {reg setbits clearbits} {
- set old [mrw $reg]
- set new [expr ($old & ~$clearbits) | $setbits]
- mww $reg $new
-}
-
proc showNOR {} {
puts "This is the current NOR setup"
set PLL_CLK_BYPASS [regs PLL_CLK_BYPASS]
puts [format "CLKCORE_AHB_CLK_CNTRL (0x%x): 0x%x" $CLKCORE_AHB_CLK_CNTRL [mrw $CLKCORE_AHB_CLK_CNTRL]]
- ocd_mem2array value 32 $CLKCORE_AHB_CLK_CNTRL 1
+ mem2array value 32 $CLKCORE_AHB_CLK_CNTRL 1
# see if the PLL is in bypass mode
set bypass [expr ($value(0) & $PLL_CLK_BYPASS) >> 24 ]
puts [format "PLL bypass bit: %d" $bypass]
set PLL_CLK_BYPASS [regs PLL_CLK_BYPASS]
puts [format "CLKCORE_ARM_CLK_CNTRL (0x%x): 0x%x" $CLKCORE_ARM_CLK_CNTRL [mrw $CLKCORE_ARM_CLK_CNTRL]]
- ocd_mem2array value 32 $CLKCORE_ARM_CLK_CNTRL 1
+ mem2array value 32 $CLKCORE_ARM_CLK_CNTRL 1
# see if the PLL is in bypass mode
set bypass [expr ($value(0) & $PLL_CLK_BYPASS) >> 24 ]
puts [format "PLL bypass bit: %d" $bypass]