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target/stm32: make APCSW cacheable
[openocd.git] / tcl / target / ixp42x.cfg
diff --git a/tcl/target/ixp42x.cfg b/tcl/target/ixp42x.cfg
index 9dd9f517f16949ba169bc89f78319da9af8034c5..d7b5bf47067eab91970f47253a265cc66fcbf848 100644 (file)
--- a/tcl/target/ixp42x.cfg
+++ b/tcl/target/ixp42x.cfg
@@ -27,7 +27,7 @@ set _CPUTAPID6 0x29277013
 jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID -expected-id $_CPUTAPID2 -expected-id $_CPUTAPID3 -expected-id $_CPUTAPID4 -expected-id $_CPUTAPID5 -expected-id $_CPUTAPID6
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
+target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME
 
 
 # register constants for IXP42x SDRAM controller
Open On-Chip Debugger

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