cfg: refactor lpc1xxx targets onto one base config
[openocd.git] / tcl / target / lpc11uxx.cfg
diff --git a/tcl/target/lpc11uxx.cfg b/tcl/target/lpc11uxx.cfg
deleted file mode 100644 (file)
index 2a519fb..0000000
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# NXP lpc11uxx family
-
-source [find target/swj-dp.tcl]
-
-if { [info exists CHIPNAME] } {
-       set _CHIPNAME $CHIPNAME
-} else {
-       set _CHIPNAME lpc11uxx
-}
-
-if { [info exists ENDIAN] } {
-       set _ENDIAN $ENDIAN
-} else {
-       set _ENDIAN little
-}
-
-# Work-area is a space in RAM used for flash programming
-# By default use 6kB
-if { [info exists WORKAREASIZE] } {
-   set _WORKAREASIZE $WORKAREASIZE
-} else {
-   set _WORKAREASIZE 0x1800
-}
-
-if { [info exists CPUTAPID] } {
-       set _CPUTAPID $CPUTAPID
-} else {
-       set _CPUTAPID 0x00000000
-}
-
-# delays on reset lines
-adapter_nsrst_delay 100
-#jtag_ntrst_delay 100
-
-swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
-
-$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
-
-#set _FLASHNAME $_CHIPNAME.flash
-#flash bank $_FLASHNAME lpc2000 0 0 0 0 $_TARGETNAME
-
-if {![using_hla]} {
-   # if srst is not fitted use SYSRESETREQ to
-   # perform a soft reset
-   cortex_m reset_config sysresetreq
-}

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