set _CHIPNAME stm32f3x
}
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
+set _ENDIAN little
# Work-area is a space in RAM used for flash programming
# By default use 16kB
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
- # See STM Document RM0316
- # Section 29.6.3 - corresponds to Cortex-M4 r0p1
- set _CPUTAPID 0x4ba00477
+ if { [using_jtag] } {
+ # See STM Document RM0316
+ # Section 29.6.3 - corresponds to Cortex-M4 r0p1
+ set _CPUTAPID 0x4ba00477
+ } {
+ set _CPUTAPID 0x2ba01477
+ }
}
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID] } {
set _BSTAPID $BSTAPID
} else {
- # STM Document RM0316 rev 2 Section 30.6.2 says 0x06432041
- # but STM32F303VCT6 rev Y has 0x06422041
+ # STM Document RM0316 rev 5 for STM32F302/303 B/C size
set _BSTAPID1 0x06422041
+ # STM Document RM0313 rev 3 for STM32F37x
set _BSTAPID2 0x06432041
+ # STM Document RM364 rev 1 for STM32F334
+ set _BSTAPID3 0x06438041
+ # STM Document RM316 rev 5 for STM32F303 6/8 size
+ # STM Document RM365 rev 3 for STM32F302 6/8 size
+ # STM Document RM366 rev 2 for STM32F301 6/8 size
+ set _BSTAPID4 0x06439041
+ # STM Document RM016 rev 5 for STM32F303 D/E size
+ set _BSTAPID5 0x06446041
}
if {[using_jtag]} {
- jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2
+ swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
+ -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
+ -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
}
set _TARGETNAME $_CHIPNAME.cpu
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
-# if srst is not fitted use SYSRESETREQ to
-# perform a soft reset
-cortex_m reset_config sysresetreq
+reset_config srst_nogate
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}