cfg: add stm32 cmsis-dap compliant config

[openocd.git] / tcl / target / stm32f4x.cfg

diff --git a/tcl/target/stm32f4x.cfg b/tcl/target/stm32f4x.cfg
index b5ab200481b0543c3a5cace4a6bb55cec65cc544..eafa1226865fe313f5bfb6d88fa7e0341a530ea4 100644 (file)
--- a/tcl/target/stm32f4x.cfg
+++ b/tcl/target/stm32f4x.cfg
@@ -1,5 +1,10 @@
 # script for stm32f4x family
 
+#
+# stm32 devices support both JTAG and SWD transports.
+#
+source [find target/swj-dp.tcl]
+
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
 } else {
@@ -29,7 +34,9 @@ if { [info exists WORKAREASIZE] } {
 adapter_khz 1000
 
 adapter_nsrst_delay 100
-jtag_ntrst_delay 100
+if {$using_jtag} {
+ jtag_ntrst_delay 100
+}
 
 #jtag scan chain
 if { [info exists CPUTAPID] } {
@@ -39,7 +46,8 @@ if { [info exists CPUTAPID] } {
   # Section 38.6.3 - corresponds to Cortex-M4 r0p1
    set _CPUTAPID 0x4ba00477
 }
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 if { [info exists BSTAPID] } {
    set _BSTAPID $BSTAPID
@@ -51,8 +59,11 @@ if { [info exists BSTAPID] } {
   # STM32F42xxx and STM32F43xxx
   set _BSTAPID2 0x06419041
 }
-jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
+
+if {$using_jtag} {
+ jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
        -expected-id $_BSTAPID2
+}
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME