# JTAG speed should be <= F_CPU/6.
# F_CPU after reset is 2MHz, so use F_JTAG max = 333kHz
-adapter_khz 100
+adapter_khz 300
adapter_nsrst_delay 100
-if {$using_jtag} {
+if {[using_jtag]} {
jtag_ntrst_delay 100
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
- # See STM Document RM0038
- # Section 24.6.3
- set _CPUTAPID 0x4ba00477
+ if { [using_jtag] } {
+ # See STM Document RM0038
+ # Section 24.6.3
+ set _CPUTAPID 0x4ba00477
+ } {
+ set _CPUTAPID1 0x2ba01477
+ set _CPUTAPID2 0x0bc11477
+ }
}
-swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID1 -expected-id $_CPUTAPID2
if { [info exists BSTAPID] } {
# FIXME this never gets used to override defaults...
set _BSTAPID 0x06416041
}
-if {$using_jtag} {
- jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
+if {[using_jtag]} {
+ swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
}
set _TARGETNAME $_CHIPNAME.cpu
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
-# if srst is not fitted use SYSRESETREQ to
-# perform a soft reset
-cortex_m reset_config sysresetreq
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}
proc stm32l_enable_HSI {} {
# Enable HSI as clock source
stm32l_enable_HSI
}
+$_TARGETNAME configure -event reset-start {
+ adapter_khz 300
+}