if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
- # See STM Document RM0038
- # Section 24.6.3
- set _CPUTAPID 0x4ba00477
+ if { [using_jtag] } {
+ # See STM Document RM0038
+ # Section 30.6.3 - corresponds to Cortex-M3 r2p0
+ set _CPUTAPID 0x4ba00477
+ } {
+ set _CPUTAPID1 0x2ba01477
+ set _CPUTAPID2 0x0bc11477
+ }
}
-swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+if { [using_jtag] } {
+ swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+} else {
+ swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID1 -expected-id $_CPUTAPID2
+}
if { [info exists BSTAPID] } {
# FIXME this never gets used to override defaults...
set _BSTAPID $BSTAPID
} else {
- # See STM Document RM0038
- # Section 24.6.2
- set _BSTAPID 0x06416041
+ # See STM Document RM0038 Section 30.6.1
+ # (section 30.6.2 seems incorrect, at least in RM0038 DocID 15965 Rev 10)
+
+ # Low and medium density
+ set _BSTAPID1 0x06416041
+ # Cat.3 device (medium+ density)
+ set _BSTAPID2 0x06427041
+ # Cat.4 device, STM32L15/6xxD or Cat.3 device, some STM32L15/6xxC-A models
+ set _BSTAPID3 0x06436041
+ # Cat.5 device (high density), STM32L15/6xxE
+ set _BSTAPID4 0x06437041
}
if {[using_jtag]} {
- jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
+ swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 -expected-id $_BSTAPID4
}
set _TARGETNAME $_CHIPNAME.cpu
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
-# if srst is not fitted use SYSRESETREQ to
-# perform a soft reset
-cortex_m reset_config sysresetreq
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}
proc stm32l_enable_HSI {} {
# Enable HSI as clock source