NOR: lpc2000 Add support for LPC84x devices

[openocd.git] / tcl / target / stm32l4x.cfg

diff --git a/tcl/target/stm32l4x.cfg b/tcl/target/stm32l4x.cfg
index dec006985a3a1dda58bc4403e637fcfe8af3a591..496b47a72b6e4ce3640ea99e1d337799f832c8f0 100644 (file)
--- a/tcl/target/stm32l4x.cfg
+++ b/tcl/target/stm32l4x.cfg
@@ -36,22 +36,14 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-if { [info exists BSTAPID] } {
-   set _BSTAPID $BSTAPID
-} else {
-  # See STM Document RM0351
-  # Section 44.6.3
-  # STM32L4X6
-  set _BSTAPID1 0x06415041
-}
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 if {[using_jtag]} {
- swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1
+   jtag newtap $_CHIPNAME bs -irlen 5
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -84,7 +76,7 @@ $_TARGETNAME configure -event reset-init {
        # Use MSI 24 MHz clock, compliant even with VOS == 2.
        # 3 WS compliant with VOS == 2 and 24 MHz.
        mww 0x40022000 0x00000103   ;# FLASH_ACR = PRFTBE | 3(Latency)
-       mww 0x40021000 0x00000099   ;# RCC_CR = MSI_ON | MSIRGSEL| MSI Range 10
+       mww 0x40021000 0x00000099   ;# RCC_CR = MSI_ON | MSIRGSEL | MSI Range 9
        # Boost JTAG frequency
        adapter_khz 4000
 }